Re: [USRP-users] B210 -- AD9361 low-level access and changing filter configuration

2017-09-12 Thread Rob Heig via USRP-users
Hi, Thank you both for your help! :) I had started myself patching UHD for the job like Sylvain did, but that scared me a bit since I didn't want to stump on the feet of the library and risk having some strange behaviour, therefore I preferred to ask first ;) Have a nice day! Rob On 12 September

[USRP-users] X310 REF LED is blinking

2017-09-12 Thread Jorge Chen via USRP-users
Dear all The LED of REF on the front panel of one of my X310 is blinking instead of constantly lighting up while working, that is, the reference clock is not able to be locked with other x310s (4x4 MIMO system). I've checked the reference clock source is constantly output, and other X310s works

Re: [USRP-users] How to Access a user register in fpga of X310 using UHD (3.10.2)

2017-09-12 Thread Martin Braun via USRP-users
multi_usrp has many APIs, not all apply for all devices. enumerate_registers() is from USRP2-era. I'm curious -- have you already done the FPGA work, or is this where you're starting? In general, registers are exposed via the RFNoC XML file (e.g., radio_x300.xml). -- M On 09/12/2017 02:04 PM,

Re: [USRP-users] How to Access a user register in fpga of X310 using UHD (3.10.2)

2017-09-12 Thread Taliver Heath via USRP-users
And following up on this -- how do you enumerate the names of the registers? They seem to be present in the code, but "enumerate_registers" doens't do anything: void ListAllRegisters(uhd::usrp::multi_usrp::sptr usrp) { auto list = usrp->enumerate_registers(); cout << "Register List (" <<

Re: [USRP-users] B210 -- AD9361 low-level access and changing filter configuration

2017-09-12 Thread Julian Arnold via USRP-users
Hey, In case you haven't already adopted the straight forward approach mentioned by Sylvain I just dug out the tool I mentioned and moved it to my github account [1]. I quickly compiled and linked against a recent version of UHD (3.9.6) to confirm that it still works. Build as usual: mkdir

Re: [USRP-users] problem with RFNoC block not outputting

2017-09-12 Thread Jason Matusiak via USRP-users
OK, I think that I have solved it. A vector size of 2048 seems to not work in RFNoC, no matter who wrote the block. When I dial back to 256 that seems to work. I changed my block to output a tlast every 256 samples, and data passes through fine now. Is there a way to make 2048 work in

Re: [USRP-users] How to Access a user register in fpga of X310 using UHD (3.10.2)

2017-09-12 Thread Sugandha Gupta via USRP-users
Hi Karan Take a look at the block_ctrl files here: https://github.com/EttusResearch/uhd/tree/maint/host/lib/rfnoc/. E.g. the ddc_block_ctrl_impl.cpp Use sr_write() to write to user implemented registers in the FPGA. Hope this helps. On Thu, Aug 31, 2017 at 3:28 PM, Karan Suri via USRP-users <

Re: [USRP-users] 4 Rx channels from an X310

2017-09-12 Thread Derek Kozel via USRP-users
Hello Joshua, The default FPGA image now has two DDCs which each have two DSP chains. The message you link to is from 2014 and we've substantially updated the contents of the FPGA since then. Currently the TwinRX is the primary daughtercard making use of these additional DDC chains as the others

Re: [USRP-users] B210 -- AD9361 low-level access and changing filter configuration

2017-09-12 Thread Sylvain Munaut via USRP-users
Personally I'm using a patched UHD where I expose the SPI device : diff --git a/host/lib/usrp/b200/b200_impl.cpp b/host/lib/usrp/b200/b200_impl.cpp index a513e1336..01c1e3b51 100644 --- a/host/lib/usrp/b200/b200_impl.cpp +++ b/host/lib/usrp/b200/b200_impl.cpp @@ -549,6 +549,8 @@

[USRP-users] 4 Rx channels from an X310

2017-09-12 Thread Josh Sendall via USRP-users
Hi all, I have been looking through some previous posts on the mailing list, for example [USRP-users] subdev spec for two channels with USRP X310 ( http://http//lists.ettus.com/pipermail/usrp-users_lists.ettus.com/2014-July/010010.html) which suggests that it should not be possible to receive

Re: [USRP-users] the transmitter cannot receive the acknowledgement from the receiver

2017-09-12 Thread Mike McLernon via USRP-users
Hi Seah, Based on the error you're getting below, the coarse frequency offset (CFO) estimator is receiving a real signal when it will accept only a complex signal. Cast that signal to be complex before it enters the CFO estimator, and you should eliminate that error. Best, Mike

Re: [USRP-users] B210 -- AD9361 low-level access and changing filter configuration

2017-09-12 Thread Rob Heig via USRP-users
Hi Julian, Sure, no hurry, thanks a lot!!! :) Best, RH On 12 September 2017 at 12:12, Julian Arnold wrote: > Hey Rob, > > I remember creating a small example tool to use the filter API and to > write to the RX FIR. > If you can wait till the evening I'll dig it out at

Re: [USRP-users] B210 -- AD9361 low-level access and changing filter configuration

2017-09-12 Thread Julian Arnold via USRP-users
Hey Rob, I remember creating a small example tool to use the filter API and to write to the RX FIR. If you can wait till the evening I'll dig it out at home and share it with you. Cheers, Julian Julian Arnold, M.Sc Institute for Networked Systems RWTH-Aachen University Kackertstrasse 9 52072

Re: [USRP-users] B210 -- AD9361 low-level access and changing filter configuration

2017-09-12 Thread Rob Heig via USRP-users
Hi again, Some more info that I've gathered in the meantime on the issue: - the crashes seem more related to the fact that I've been dumping the retrieved I/Q pairs on file, so we could leave it out for the moment; - what I did to test whether the FIR is working as expected or not, is to retrieve