Hi Jerrid/Brian, I wanted to follow up and let you know that the fix for this issue is now available on the UHD-3.15.LTS branch. Thank you for posting and for your patience.
Regards, Michael On Thu, Jan 2, 2020 at 8:57 AM Jerrid Plymale via USRP-users < usrp-users@lists.ettus.com> wrote: > Yes, I have just been following the guide on the getting started with > RFNoC page. > > > > Best Regards, > > > > Jerrid > > > > *From:* Brian Padalino <bpadal...@gmail.com> > *Sent:* Thursday, January 2, 2020 8:52 AM > *To:* Jerrid Plymale <jerrid.plym...@canyon-us.com> > *Cc:* usrp-users@lists.ettus.com > *Subject:* Re: [USRP-users] Building RFNoC image with default blocks > fails, [DRC MDRV-1] Multiple Driver Nets: Net has multiple drivers > > > > On Thu, Jan 2, 2020 at 11:48 AM Jerrid Plymale < > jerrid.plym...@canyon-us.com> wrote: > > I am trying to generate a custom RFNoC FPGA Image using this version of > UHD. > > > > OK. So you've checked out fde2a94eb7231af859653db8caaf777ae2b66199 and > you're trying to build a regular image with Vivado 2018.3. Correct? > > > > Brian > _______________________________________________ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >
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