[USRP-users] [UHD] Update to USRP E310 filesystem (v3.15.0.0 pre-release)

2019-05-24 Thread Sugandha Gupta via USRP-users
Hi all We finally have a new filesystem for E310. This is an early release so people can try it out before the final UHD-3.15.0.0 release. The filesystem is now very similar to N3XX and E320 filesystem and will be updated with every UHD release in future. Here is a summary of the changes: - The

Re: [USRP-users] E320 Auto-Booting function not working?

2019-05-07 Thread Sugandha Gupta via USRP-users
Hi Chris You are right. This seems like a bug on E320. We are working on fixing it and will have an update for you soon. Regards Sugandha On Mon, May 6, 2019 at 10:12 PM Chris Gobbett via USRP-users < usrp-users@lists.ettus.com> wrote: > Following the steps from the E320 getting started guide [

Re: [USRP-users] Ethernet over SFP+ in custom FPGA design (X3x0)

2017-11-28 Thread Sugandha Gupta via USRP-users
I can answer the question related to the padding. I am not sure about the rest. Ettus Padding: An ethernet frame has 6 bytes of destination MAC address and 6 bytes of Source MAC address. Since we use 64 bits/8 bytes of data in one clock cycle, we add a 6 byte padding in front of the ethernet packe

Re: [USRP-users] How to Access a user register in fpga of X310 using UHD (3.10.2)

2017-09-12 Thread Sugandha Gupta via USRP-users
Hi Karan Take a look at the block_ctrl files here: https://github.com/EttusResearch/uhd/tree/maint/host/lib/rfnoc/. E.g. the ddc_block_ctrl_impl.cpp Use sr_write() to write to user implemented registers in the FPGA. Hope this helps. On Thu, Aug 31, 2017 at 3:28 PM, Karan Suri via USRP-users < u