What I'd like to do is run a test bench in batch mode, preferably
overnight, and log all signals in the design. That way I could test more
scenarios without having to bring up the gui.
Thank you,
Erik
On Tue, Jul 24, 2018 at 2:14 PM, Martin Braun via USRP-users <
usrp-users@lists.ettus.com> wrot
On 07/23/2018 03:17 PM, Erik Malone via USRP-users wrote:
> Hi
>
> I'm looking for a way to log all signals when simulating an RFNoC design
> in batch mode. This would help me to run longer tests and then bring up
> a waveform whenever an error occurred. Preferably, I'd like to keep
> within Et
Hi
I'm looking for a way to log all signals when simulating an RFNoC design in
batch mode. This would help me to run longer tests and then bring up a
waveform whenever an error occurred. Preferably, I'd like to keep within
Ettus' current simulation flow.
Thank you,
Erik
