Andreas,
you *should* be able to use the .bit file. Does this happen when you
build from master branch? The Vivado version is correct.
-- M
On 08/23/2018 02:11 AM, Sylvain Munaut via USRP-users wrote:
> Hi,
>
>> Just for curiosity:
>> The .bit-file is exactly the same as the .bin-file, except
Hi,
> Just for curiosity:
> The .bit-file is exactly the same as the .bin-file, except that the
> .bit-file has an additional header, right? In my case (Vivado 2017.04),
> the header of the .bit-file is 124 Bytes while the uhd_image_loader
> assumes a header size of 116 Bytes. Depends this header
Hi Sylvain,
Thank you for your help! It solved my problem.
Just for curiosity:
The .bit-file is exactly the same as the .bin-file, except that the
.bit-file has an additional header, right? In my case (Vivado 2017.04),
the header of the .bit-file is 124 Bytes while the uhd_image_loader
Hi all,
I try to build a RFNOC FPGA image for the USRP X310 according to the
"Getting Started with RFNoC Development" web page
(https://kb.ettus.com/Getting_Started_with_RFNoC_Development).
Command:
$ ./uhd_image_builder.py window fft -d x310 -t X310_RFNOC_HG -m 5
--fill-with-fifos
The
