Re: [USRP-users] RFNoC: complex_vector support from reprogrammable embedded settings registers

2017-08-14 Thread EJ Kreinar via USRP-users
Ehh, I dont think that's an accurate description of what's going on... Take a look at the 32-bit floating point definition: https://en.wikipedia.org/wiki/Single-precision_floating-point_format The wikipedia definition seems to be essentially what's going on here, with the added twist that the

Re: [USRP-users] RFNoC: complex_vector support from reprogrammable embedded settings registers

2017-08-14 Thread EJ Kreinar via USRP-users
Hi Andrew, As far as I can tell, that particular verilog block implements a 32-bit floating point to 16-bit fixed point conversion. The name may be a misnomer because it does not actually break the input into I/Q channels. For floating to fixed conversion in software, I usually refer to this

Re: [USRP-users] RFNoC: complex_vector support from reprogrammable embedded settings registers

2017-08-13 Thread Andrew Lanez via USRP-users
EJ, I spent some time wrestling with the 32-bit to 16-bit conversion in my verilog noc block then realized doing the conversion in the C++ control block driver might be more straightforward. I'm trying to digest the following:

Re: [USRP-users] RFNoC: complex_vector support from reprogrammable embedded settings registers

2017-08-08 Thread Andrew Lanez via USRP-users
Typo, the 3rd to last paragraph should read: Or I could hack *rfnoc_fir_cci()*. I started this by replacing int vectors with std::complex vectors everywhere FIR taps were referenced in the in-tree module's C++ library but I stopped when it traced up to block.h because that may affect other