[USRP-users] B200mini AGC: read gain through UHD

Hi everybody, I would like to use the fast attack AGC of the RF chip on the B200min, which I can enable through UHD and the property tree. Is there a way to read the actual gain the RF chip has set once the AGC is in locked state? Best regards, Emanuel

Re: [USRP-users] GR in the E320

OK, that seems to be building (who knows if it will succeed), thanks. I can't seem to find directions online about how to add in my own recipes, or those written up somewhere? Basically, I am trying to figure out how I can add something like gr-my_blocks to the project (either part of bitbake,

[USRP-users] GR in the E320

OK, so I am a total newbie when it comes to open-embedded. I know that the docker to build doesn't include a gnuradio-image bitbake option (only developer-image), so I tried to make one. I created a new gnuradio-image.bb file and added gnuradio to the list of things to build. Sadly, I appear

[USRP-users] Connect Eth Phy to FPGA

Hello, We want to use E310 as a peripheral network device like N210. We want the RF samples come to ethernet interface through FPGA without passing from CPU. In short, we don't want to use CPU. So, can we configure FPGA to achieve this task? (Connecting ethernet interface directly to FPGA)

Re: [USRP-users] Connect Eth Phy to FPGA

You should check the schematic, but as I recall the ethernet interface is connected directly to the ARM and not via the FPGA fabric. Philip On 05/21/2019 10:32 AM, Ramazan Çetin via USRP-users wrote: > Hello, > > We want to use E310 as a peripheral network device like N210. We want > the RF

Re: [USRP-users] GR in the E320

Interesting, thanks. They are using sumo, so I will try to check that branch out and see how it works. I will need to research how to add it in and build it as I see pulling it down and checking out sumo alone isn't enough. Thanks for the insights. From:

Re: [USRP-users] GR in the E320

https://www.yoctoproject.org/docs/latest/mega-manual/mega-manual.html Also: https://training.linuxfoundation.org/training/embedded-linux-development-with-yocto-project/ Philip On 05/21/2019 11:18 AM, Jason Matusiak via USRP-users wrote: > OK, that seems to be building (who knows if it will

Re: [USRP-users] Connect Eth Phy to FPGA

Hi, Yes, it's connected to the PS and not the PL. _However_ ... you could just remove the ethernet driver from the linux side, then drive the built-in ethernet mac from the FPGA by just acting as an AXI master. None of this is trivial however ... Cheers, Sylvain

Re: [USRP-users] Connect Eth Phy to FPGA

On 05/21/2019 02:56 PM, Sylvain Munaut wrote: > Hi, > > Yes, it's connected to the PS and not the PL. > _However_ ... you could just remove the ethernet driver from the linux > side, then drive the built-in ethernet mac from the FPGA by just > acting as an AXI master. > > None of this is trivial

Re: [USRP-users] Running network mode on E310 and N300

Hm, if you have to provide a uniform interface, but need to use different versions of UHD underneath: What about simply building two identical libraries that use the two necessary versions of UHD, and only runtime-link (plugin-style) either shared object at run time, depending on which USRP you