Re: [USRP-users] Phase jumps in USRP B210 with GPSDO

On 09/21/2017 02:27 PM, Piotr Krysik via USRP-users wrote: -- Piotr Krysik Also take into account that I'm not comparing phase signals observed by two different USRPs. What I have shown is for single channel of one USRP in which such jumps are observed (I'm comparing phase of digitally

Re: [USRP-users] Verifying MIMO cable integrity

Hi John, I've matched your configuration, with a N210 with GPSDO as master, and a N210 slave connected via a MIMO cable. I was able to create a pair of synced streams with the flowgraph attached without issue. Can you give it a try? Otherwise email us at supp...@ettus.com and we can follow up

Re: [USRP-users] E310 "subdev spec" equivalent in RFNoC?

EJ, I went through that same sequence of attempts and never got a solution other than using TX/RX and RX2 on the same A channel. On Thu, Sep 21, 2017 at 14:05 EJ Kreinar via USRP-users < usrp-users@lists.ettus.com> wrote: > Hi all, > > I'm trying to specify exactly which channel to record from

Re: [USRP-users] Verifying MIMO cable integrity

That seems correct to me, but I don't have a useful configuration in my lab to test. (No N2xx, no MIMO cables). On 2017-09-21 16:02, John Shields via USRP-users wrote: > Hi, > I have been struggling with trying to get two coherent channels from a pair > of N200 , one with GPSDO and the other

[USRP-users] Verifying MIMO cable integrity

Hi, I have been struggling with trying to get two coherent channels from a pair of N200 , one with GPSDO and the other with a MIMO cable. I realise that, according to the sync_page doc, I need to do some software magic in order to attempt to phase-sync but the slave unit reports that it

Re: [USRP-users] Phase jumps in USRP B210 with GPSDO

W dniu 21.09.2017 o 19:16, Piotr Krysik via USRP-users pisze: > W dniu 21.09.2017 o 17:19, mle...@ripnet.com pisze: >> You talk about board-mounted GPSDOs in each of your B210s, but then >> talk about using an Octoclock-G. >> >> In the Octoclock-G example, you are explicitly selecting "external"

[USRP-users] E310 "subdev spec" equivalent in RFNoC?

Hi all, I'm trying to specify exactly which channel to record from an RFNoC flowgraph on the E310, but I cant seem to get this to work Typically, in non-RFNoC applications, or in the "legacy_compat" mode, you can use the following options: uhd_rx_cfile -r -f -A TX/RX --spec=A:A

Re: [USRP-users] Help - Unbrick N200

Take a look at this Application Note. https://kb.ettus.com/N200/N210_Device_Recovery --​Neel Pandeya On 21 September 2017 at 09:26, Marcus D. Leech via USRP-users < usrp-users@lists.ettus.com> wrote: > On 09/21/2017 12:12 PM, Chun Yang - Sigem via USRP-users wrote: > > I need to use N200

Re: [USRP-users] Phase jumps in USRP B210 with GPSDO

W dniu 21.09.2017 o 17:19, mle...@ripnet.com pisze: > > You talk about board-mounted GPSDOs in each of your B210s, but then > talk about using an Octoclock-G. > > In the Octoclock-G example, you are explicitly selecting "external" > for your refclock and time source? > > It is fully-expected that

Re: [USRP-users] Help - Unbrick N200

On 09/21/2017 12:12 PM, Chun Yang - Sigem via USRP-users wrote: I need to use N200 for a project. However, its LED D does not lit up (no firmware) and no response when pinging through the Ethernet connection. Followed the instruction on Ettus website to unbrick this N200 and here is what I

[USRP-users] Help - Unbrick N200

I need to use N200 for a project. However, its LED D does not lit up (no firmware) and no response when pinging through the Ethernet connection. Followed the instruction on Ettus website to unbrick this N200 and here is what I got (from a Windows 10 laptop computer). With an Xilinx Platform

[USRP-users] Advise on how to modifying HDL design E310 to add custom blocks

Hello, We want to add some blocks to HDL design in E310 device. We followed the instructions to build Vivado project and it worked okay. Thing is the built design when opened in Vivado looks this way ... where design sources

Re: [USRP-users] Phase jumps in USRP B210 with GPSDO

You talk about board-mounted GPSDOs in each of your B210s, but then talk about using an Octoclock-G. In the Octoclock-G example, you are explicitly selecting "external" for your refclock and time source? It is fully-expected that no two GPSDOs will precisely agree on frequency and phase, and

Re: [USRP-users] Testing with single B200

Hi Rensi: Fantastic that you have your B200 working! Packet reception is more complex. The best place to start is at gnuradio.org with their quite detailed tutorials. There is an example showing packet transmission and reception, as I recall. There are also

[USRP-users] Phase jumps in USRP B210 with GPSDO

Hi all, I'm trying trying to use multiple USRPs B210 (that have GPSDOs mounted) for tasks requiring good phase coherence between the devices (i.e. phased antenna array) and there is some problem. In the recorded signal I have found abrupt phase jumps that make B210s unusable for performing phase

[USRP-users] creating rx_stream multiple times throws assertion error.

Hi , I have a requirement to toggle between channels and collect data for every 10 seconds using E310. I first specify subdevice A:A and create a rx_stream collect data and then set subdevice A:B and try to create and rx_stream . I got an assertion error . So I tried to delete the first

[USRP-users] Integration of System Generator custom block into RFNOC

Hello, We are trying to integrate a custom module into RFNOC from Xilinx System Generator. Has anyone determined the best design flow for this process? We have exported a simple SysGen design (based on a digital gain block) as a synthesized checkpoint, but have been unable to connect the design