[USRP-users] SFP Transceivers for N310 1/10Gbps Fiber Ethernet
Hi, I am working on a project where several N310s are connected to a fiber-Ethernet switch. The fibers are of single mode with length from 1km to 10km. My problem is selecting the right SFP transceivers. Currently, I used the official SFP to RJ45 converter (come from Ettus with N310) followed by another pair of RJ45 to SFP converter. https://www.amazon.com/gp/product/B06XC1VDMD/ref=oh_aui_detailpage_o00_s00?ie=UTF8&psc=1 This is a work around solution. I tried to connect N310 and Dell N3048 switch (2 SFP ports) directly through a pair of 10Gtek SFP transceivers (1Gbps) that come with the RJ45 to SFP converter but it does not work. Could you recommend any SFP transceivers that work on your case? both 1Gbps and 10Gbps. Does 10Gbps SFP+ transceiver backward compatible with 1Gbps socket? Thank you very much! Regards, Zhongyuan Zhao PhD Candidate, Department of Computer Science & Engineering, University of Nebraska-Lincoln Suite 117, Schorr Center, Lincoln, Nebraska 68588-0115 ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] Synchronizing channels in USRP X310
On 07/20/2018 10:29 AM, Hojoon Yang via USRP-users wrote: Hi, all. Can anyone confirm this please? Thanks! No, you don't need to set the sampling-rate under control of set_command_time() ---원본메일--- 보낸사람 : Hojoon Yang via USRP-users 받는사람: usrp-users 보낸날짜: 2018-07-15 19:36:08 GMT +0900 (ROK) 제목: [USRP-users]Synchronizing channels in USRP X310 Hi, I'm using a USRP X310 + 2 UBX-160 for 2x2 MIMO application. For synchronizing 4 channels(2 TX, 2 RX) in the USRP X310, I read the manual[1] and perform the following. set_time_unknown_pps() set_tx_rate(rate) set_rx_rate(rate) uhd::time_spec_t cmd_time = usrp->get_time_now() + uhd::time_spec_t(0.1); usrp->set_command_time(cmd_time); usrp->set_tx_freq(1820e6, 0); usrp->set_tx_freq(1820e6, 1); usrp->set_rx_freq(1725e6, 0); usrp->set_rx_freq(1725e6, 1); usrp->clear_command_time(); 1. I'm wondering that is this enough for synchronizing 4 channels in the USRP X310?? 2. Do I need to set sampling rate simultaneously? Like frequency? For example, uhd::time_spec_t cmd_time = usrp->get_time_now() + uhd::time_spec_t(0.1); usrp->set_command_time(cmd_time); set_tx_rate(rate) set_rx_rate(rate) usrp->clear_command_time(); Thanks. [1] https://files.ettus.com/manual/page_sync.html ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] RFNoc Blocks with Xilinx IP
Hi Brendon, I have an example repo that shows how to use out-of-tree makefiles with xilinx IP (.xci definitions): github.com/ejk43/rfnoc-ootexample Please feel free to copy this format- a few other rfnoc developers on the mailing list indicated it has worked for them too. Note that the rfnoc blocks are currently targeting the uhd-fpga source code as of Vivado 2015.4, and the testbenches will NOT currently run against most recent uhd-fpga and Vivado 2017.4. I would really appreciate a PR to update the IP to use vivado 2017.4 and noc blocks with the new inputs to the noc_shell :) I'll update it "eventually" but no idea when exactly. Hope this helps! Looking forward to seeing your OOT fpga blocks :) EJ On Fri, Jul 20, 2018, 12:19 PM Neel Pandeya via USRP-users < usrp-users@lists.ettus.com> wrote: > Hello Brendon: > > Could you describe in more detail what you're trying to do, or how you > want to add your Xilinx IP? > > Are you still using "rfnocmodtool" to add your custom RFNoC blocks? > > The flow described in that document, and in the Application Note below, is > the primary/intended way to add IP to an RFNoC installation. > > https://kb.ettus.com/Getting_Started_with_RFNoC_Development > > Please note that you should use the head of the UHD master branch, not the > "rfnoc-devel" branch, when using RFNoC. > > --Neel Pandeya > > > > > On 20 July 2018 at 07:01, Chetwynd, Brendon - 0551 - MITLL via USRP-users > wrote: > >> I have been following the following blog post: >> >> >> >> >> http://www.synchronouslabs.com/blog/creating-a-custom-rfnoc-block-with-using-xillinx-ip >> >> >> >> Near the end, it instructs the user to add the Xilinx IP files (.xci for >> example) to the UHD project directory. >> >> >> >> However, as this is a clone of the Ettus Research repo ( >> https://github.com/EttusResearch/fpga.git), I am wondering if there is >> another way to do it that is compliant with the RFNOC build process. >> >> >> >> Specifically, I would like to drop my customized Xilinx IP within my own >> rfnoc repository. >> >> >> >> Any advice? >> >> >> >> Thanks, >> >> Brendon >> >> >> >> >> >> ___ >> USRP-users mailing list >> USRP-users@lists.ettus.com >> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >> >> > ___ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com > ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] RFNoc Blocks with Xilinx IP
Hello Brendon: Could you describe in more detail what you're trying to do, or how you want to add your Xilinx IP? Are you still using "rfnocmodtool" to add your custom RFNoC blocks? The flow described in that document, and in the Application Note below, is the primary/intended way to add IP to an RFNoC installation. https://kb.ettus.com/Getting_Started_with_RFNoC_Development Please note that you should use the head of the UHD master branch, not the "rfnoc-devel" branch, when using RFNoC. --Neel Pandeya On 20 July 2018 at 07:01, Chetwynd, Brendon - 0551 - MITLL via USRP-users < usrp-users@lists.ettus.com> wrote: > I have been following the following blog post: > > > > http://www.synchronouslabs.com/blog/creating-a-custom- > rfnoc-block-with-using-xillinx-ip > > > > Near the end, it instructs the user to add the Xilinx IP files (.xci for > example) to the UHD project directory. > > > > However, as this is a clone of the Ettus Research repo ( > https://github.com/EttusResearch/fpga.git), I am wondering if there is > another way to do it that is compliant with the RFNOC build process. > > > > Specifically, I would like to drop my customized Xilinx IP within my own > rfnoc repository. > > > > Any advice? > > > > Thanks, > > Brendon > > > > > > ___ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com > > ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] B205mini debug register
Any thoughts on the above? Hello, Is there a non-invasive way to monitor a debug register in the b205mini FPGA, with minimal/no changes to software. To give some background, I am looking at making some changes to the B205 mini HDL and trying to see if I can use an existing debug/unused register for debug purposes. I am trying to avoid using chipscope since I don' t have the JTAG adapter for the B205 mini. Thanks On Wed, Jul 18, 2018 at 9:17 PM, Chintan Patel wrote: > Hello, > > Is there a non-invasive way to monitor a debug register in the b205mini > FPGA, with minimal/no changes to software. To give some background, I am > looking at making some changes to the B205 mini HDL and trying to see if I > can use an existing debug/unused register for debug purposes. I am trying > to avoid using chipscope since I don' t have the JTAG adapter for the B205 > mini. > > Thanks > Chintan > ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] Synchronizing channels in USRP X310
Hi, all.Can anyone confirm this please?Thanks! ---원본메일---보낸사람 : Hojoon Yang via USRP-users 받는사람: usrp-users 보낸날짜: 2018-07-15 19:36:08 GMT +0900 (ROK)제목: [USRP-users]Synchronizing channels in USRP X310 Hi, I'm using a USRP X310 + 2 UBX-160 for 2x2 MIMO application. For synchronizing 4 channels(2 TX, 2 RX) in the USRP X310, I read the manual[1] and perform the following. set_time_unknown_pps() set_tx_rate(rate) set_rx_rate(rate) uhd::time_spec_t cmd_time = usrp->get_time_now() + uhd::time_spec_t(0.1); usrp->set_command_time(cmd_time); usrp->set_tx_freq(1820e6, 0); usrp->set_tx_freq(1820e6, 1); usrp->set_rx_freq(1725e6, 0); usrp->set_rx_freq(1725e6, 1); usrp->clear_command_time(); 1. I'm wondering that is this enough for synchronizing 4 channels in the USRP X310?? 2. Do I need to set sampling rate simultaneously? Like frequency? For example, uhd::time_spec_t cmd_time = usrp->get_time_now() + uhd::time_spec_t(0.1); usrp->set_command_time(cmd_time); set_tx_rate(rate) set_rx_rate(rate) usrp->clear_command_time(); Thanks. [1] https://files.ettus.com/manual/page_sync.html ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] Update USRP E310
https://files.ettus.com/e3xx_images/README On Fri, 2018-07-20 at 13:21 +0300, Ivan Zahartchuk via USRP-users wrote: > Hello tell me how to update the E310 to e3xx-release-4? > Thanks in advance. > ___ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
[USRP-users] RFNoc Blocks with Xilinx IP
I have been following the following blog post: http://www.synchronouslabs.com/blog/creating-a-custom-rfnoc-block-with-using -xillinx-ip Near the end, it instructs the user to add the Xilinx IP files (.xci for example) to the UHD project directory. However, as this is a clone of the Ettus Research repo (https://github.com/EttusResearch/fpga.git), I am wondering if there is another way to do it that is compliant with the RFNOC build process. Specifically, I would like to drop my customized Xilinx IP within my own rfnoc repository. Any advice? Thanks, Brendon smime.p7s Description: S/MIME cryptographic signature ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
[USRP-users] Update USRP E310
Hello tell me how to update the E310 to e3xx-release-4? Thanks in advance. ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
[USRP-users] Bug in timed switching of sample rate
Hello everyone,
I am experencing some issues when switching the sample rate.
I have two synchronized USRP X310 with a total of 4 TwinRX. I am doing
timed commands to jump around in the spectrum with all receivers at the
same frequency (SIMO stuff).
I also need to switch sample rates in between. When I keep the sample
rate constant, everything works fine, but once I switch it between two
timed receptions, I get very strange errors. Like I get an end-of-frame
after just a part of the samples I requested.
It seems like it is not possible to time the sample rate switch command.
Here is a debug output of my code which makes it quite clear what happens:
(1) Changed sample rate from 1e+07 to 5e+07
(2) Requested 32768 Samples
(3) Requested 32768 Samples
(4) Requested 32768 Samples
(5) Changed sample rate from 5e+07 to 1e+07
(6) Reading 32768 Samples
(7) Got only 6553 of 32768 samples at EOF
Commands 1-5 are transmitted to the USRP right away using its command
buffer. Then my program starts reading the first requested 32768 but
gets only 6553, which is precisely 1/5th of the requested samples. I
guess this is because he switched sample rate to 1/5th right before
executing the first stream command. But the sample rate switch is also
timed and should be executed after the three stream commands.
I attached the part of the code which is responsible for sending the
timed commands to the USRPs. This runs basically in a while(1) in a
seperate thread, while there is a seconds thread receiving the data
blocks, which produced the lines 6-7 of above output.
Is this a bug or feature I don't get? Are set_rx_rate commands not timed
when using set_command_time? How can I solve this isse? I need very
precise timing and also fast switching between frequencies and sample rates.
Best regards,
Fabian
double freq;
if(!getNextCmdFrequency(freq))
{
firstTime = true;
return;
}
//qDebug()<<"Generating recv
for"sampleRate)
{
double oldSampleRate = currentSampleRate;
currentSampleRate = receiveBlockList[currentCmdBlockListID]->sampleRate;
deviceConfig.sampleRate = currentSampleRate;
usrpDevice->set_rx_rate(currentSampleRate);
double newSampleRate = usrpDevice->get_rx_rate();
qDebug()<<"Changed sample rate
from"samplesPerSlot;
ReceiveCmdTime receivecmdTime;
receivecmdTime.blockId = currentCmdBlockListID;
receivecmdTime.slotId = currentCmdSlotListID;
receivecmdTime.time = stream_cmd.time_spec.get_real_secs();
commandTimeMutex.lock();
commandTimeList.append(receivecmdTime);
commandTimeMutex.unlock();
rxStream->issue_stream_cmd(stream_cmd);
// Calcluate time for next slot
stream_cmd.time_spec +=
receiveBlockList[currentCmdBlockListID]->receiveTime + receive_stop_offset_ts;
currentRoundTime += receive_start_offset_ts +
receiveBlockList[currentCmdBlockListID]->receiveTime + receive_stop_offset_ts;___
USRP-users mailing list
USRP-users@lists.ettus.com
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
