Re: [USRP-users] USRP X300 and phase alignment

2018-06-15 Thread Alice Lo Valvo via USRP-users

Hi Derek,

thank you for your answer. My answers are below.


Il 15/06/18 13:08, Derek Kozel ha scritto:

Hello Alice,

I think you have two different issues. You should not be encountering 
Late errors. How do you schedule your timed commands? What connection 
to the host computer are you using? 10 GigE should be able to handle 
100 MS/s, are you using 1 GigE?


I attached the python file that I created. I use 10GigE, but the channel 
bandwidth for each channel is 100MHz.. should't it be a problem?
Separately, there will always be a phase offset between channels, even 
when using timed commands. Which daughterboards are you using? The 
requirements to achieve a repeatable phase offsets are different 
between boards.

I'm using SBX 120...

Regards,
Alice


Regards,
Derek

On Fri, Jun 15, 2018 at 11:13 AM, Alice Lo Valvo via USRP-users 
mailto:usrp-users@lists.ettus.com>> wrote:


Hi all,
I have to transmit two flows with the same "start trigger".
I used one USRP X300 with two channels, but because of the large
bandwidth (100MHz), there is the L error.
So, I tried to use two USRPs X300 with the OctoClock, but when I
record the transmitted signal they are not synchronize.. One
signal starts before the other one.. there is a costant offset
phase, I think.
Any suggestion?

Thank you in advance,

Alice


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#!/usr/bin/env python2
# -*- coding: utf-8 -*-
##
# GNU Radio Python Flow Graph
# Title: Top Block
# Generated: Wed May 16 10:07:59 2018
##

from gnuradio import blocks
from gnuradio import eng_notation
from gnuradio import gr
from gnuradio import uhd
from gnuradio.eng_option import eng_option
from gnuradio.filter import firdes
from optparse import OptionParser
import optparse
import time
import sys


class top_block(gr.top_block):

def __init__(self,set_gain,input_file):
gr.top_block.__init__(self, "Top Block")

##
# Variables
##
	self.samp_rate = samp_rate = 1
self.addr = addr = "addr=192.168.40.2"
	self.gain = gain = set_gain


##
# Blocks
##
self.uhd_usrp_sink_0_0 = uhd.usrp_sink(
	",".join((addr, '')),
	uhd.stream_args(
		cpu_format="fc32",
		channels=range(2),
	),
)
self.uhd_usrp_sink_0_0.set_samp_rate(samp_rate)
self.uhd_usrp_sink_0_0.set_center_freq(500e6, 0)
self.uhd_usrp_sink_0_0.set_gain(gain, 0)
self.uhd_usrp_sink_0_0.set_antenna('TX/RX', 0)
	self.uhd_usrp_sink_0_0.set_bandwidth(samp_rate, 0)
self.uhd_usrp_sink_0_0.set_center_freq(500e6, 1)
self.uhd_usrp_sink_0_0.set_gain(gain, 1)
self.uhd_usrp_sink_0_0.set_antenna('TX/RX', 1)
	self.uhd_usrp_sink_0_0.set_bandwidth(samp_rate, 1)
#self.blocks_file_source_0 = blocks.file_source(gr.sizeof_gr_complex*1, '/home/lab/jammer/signal_08', True)
	self.blocks_file_source_0 = blocks.file_source(gr.sizeof_gr_complex*1, input_file, True)
	self.blocks_file_source_0_0 = blocks.file_source(gr.sizeof_gr_complex*1, input_file, True)

##
# Connections
##
self.connect((self.blocks_file_source_0, 0), (self.uhd_usrp_sink_0_0, 0))
	self.connect((self.blocks_file_source_0_0, 0), (self.uhd_usrp_sink_0_0, 1))

def get_samp_rate(self):
return self.samp_rate

def set_samp_rate(self, samp_rate):
self.samp_rate = samp_rate
self.uhd_usrp_sink_0_0.set_samp_rate(self.samp_rate)
self.uhd_usrp_sink_0_0.set_bandwidth(self.samp_rate, 0)
self.uhd_usrp_sink_0_0.set_bandwidth(self.samp_rate, 1)

def get_addr(self):
return self.addr

def set_addr(self, addr):
self.addr = addr


def main(top_block_cls=top_block, options=None):

parser = optparse.OptionParser()

parser.add_option('-g',dest="gain",type="int")
parser.add_option('-i',dest="input")
option,remainder=parser.parse_args()

if option.gain is None:
	sys.stderr.write('You must specify the gain with -g GAIN\n')
	exit(1)

if option.input is None:
	sys.stderr.write('You must specify the path with -i /\n')
	exit(1)

tb = top_block_cls(option.gain,option.input)
tb.start()
 #   try:
  #  raw

[USRP-users] RFNoC and MicroBlaze

2018-05-16 Thread Alice Lo Valvo via USRP-users

Hello,

I have some questions. I read that there is the possibility to integrate 
a MicroBlaze into RFNoC project. Do you know something about this? This 
is a new world for me and I tried to understand which steps to do for 
adding a MicroBlaze block in the FPGA of USRP X300. There is already a 
.bit file where it is already implemented a MicroBlaze?


Thanks in advance,
Alice

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Re: [USRP-users] Design with Vivado

2017-11-13 Thread Alice Lo Valvo via USRP-users

Thank you for the quick response.

I have another question.. if I have a custom IP core generated with 
System Generator (Simulink/MatLab), can I integrate it with RFNoC?



Alice


Il 14/11/17 00:34, Marcus D. Leech via USRP-users ha scritto:

On 11/13/2017 06:18 PM, Alice Lo Valvo via USRP-users wrote:

Hi,
I'm working with USRP X series. I'm wondering if I can design my 
custom IP Core (or project) with Vivado and then integrate it with 
RFNoC. If yes, how can I do it?

Thank you in advance,

Alice

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You might find this useful:

https://kb.ettus.com/Getting_Started_with_RFNoC_Development


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[USRP-users] Design with Vivado

2017-11-13 Thread Alice Lo Valvo via USRP-users

Hi,
I'm working with USRP X series. I'm wondering if I can design my custom 
IP Core (or project) with Vivado and then integrate it with RFNoC. If 
yes, how can I do it?

Thank you in advance,

Alice

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[USRP-users] RFNoC and GNURadio

2017-11-06 Thread Alice Lo Valvo via USRP-users

Hi all,
I'm new with RFNoC tool (USRP X3X0). I would like know if there is a way 
to use RFNoC without GNURadio Companion interface.

GNURadio is mandatory for the final implementation?

Thanks in advance,
Alice

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