Re: [USRP-users] FPGA compatibility
I reproduced the same issue (except I completely uninstalled GR, UHD,
gr-ettus, etc. before doing rm -rf rfnoc then installed rfnoc from scratch)
then checked out 'eb5eed' in uhd-fpga which fixed the FPGA compatibility
number issue but there seems to be an underlying problem with that. I can't
use the RFNoC Radio block in receive mode. For example, I ran
rfnoc/src/gr-ettus/examples/rfnoc/rfnoc_ddc.grc with everything unmodified,
out-of-the-box and got this error:
[WARNING] [X300 RADIO] set_rx_gain: could not apply gain for this
daughterboard.
Traceback (most recent call last):
File "/home/switchlanez/rfnoc/src/gr-ettus/examples/rfnoc/rfnoc_ddc.py",
line 301, in
main()
File "/home/switchlanez/rfnoc/src/gr-ettus/examples/rfnoc/rfnoc_ddc.py",
line 289, in main
tb = top_block_cls()
File "/home/switchlanez/rfnoc/src/gr-ettus/examples/rfnoc/rfnoc_ddc.py",
line 102, in __init__
self.uhd_rfnoc_streamer_radio_0.set_rx_antenna("TX/RX", 0)
File
"/home/switchlanez/rfnoc/lib/python2.7/dist-packages/ettus/ettus_swig.py",
line 3272, in set_rx_antenna
return _ettus_swig.rfnoc_radio_sptr_set_rx_antenna(self, ant, chan)
RuntimeError: LookupError: KeyError: key "TX/RX" not found in
dict(NSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,
NSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE)
Can anyone advise?
On Wed, Oct 10, 2018 at 9:06 PM Corey Hahn via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Moving to uhd-fpga and checking out 'ebf5eed' did the trick. Recompile
> the fpga. In working order again.
> Thank you for walking be through the rfnoc structure with respect to the
> git repos.
> I still think something is wrong with pybombs to cause this error in the
> first place.
>
> Corey
>
> On Wed, Oct 10, 2018 at 9:48 AM Rob Kossler wrote:
>
>> Perhaps the issue is related to pybombs. You mentioned that you
>> completely reinstalled via pybombs. I seem to recall that the pybombs
>> installation puts the fpga source into a folder called 'uhd-fpga' or
>> something like that. But, a manual UHD install puts the fpga source into a
>> folder called 'fpga-src'. Whatever folder you are using for the fpga
>> source needs to be on commit 'ebf5eed'. Maybe pybombs is simply checking
>> out 'master' for the fpga source code rather than following the appropriate
>> fpga commit that is associated with the uhd 'master'.
>>
>>
>> On Wed, Oct 10, 2018 at 10:16 AM Rob Kossler wrote:
>>
>>> I'm confused. If the 'fpga-src' folder is on commit 'ebf5eed', the
>>> compat number should be 35.1. It wasn't changed to 36.0 until the
>>> following commit. I'm pretty sure that I have built an fpga image from
>>> this source and that it ran fine with the uhd 'master' branch.
>>>
>>> Rob
>>>
>>> On Wed, Oct 10, 2018 at 8:41 AM Sylvain Munaut <246...@gmail.com> wrote:
>>>
> No dice, same ver 35 and 36 mismatch error.
When looking at the commit you mention (
6af6ac32c30d2dc0efa6eab61e4a3920649e3e62 ), the expected compat number
is 35 :
https://github.com/EttusResearch/uhd/blob/master/host/lib/usrp/x300/x300_fw_common.h#L26
Looking at the latest FPGA sources on the maint branch, I see also
compat number 35 :
https://github.com/EttusResearch/fpga/blob/maint/usrp3/top/x300/bus_int.v#L104
So you should use the 'maint' branch of the FPGA sources. The latest
FPGA master seems to have some new down conversion logic for which the
UHD host code isn't published yet.
Cheers,
Sylvain
>>> ___
> USRP-users mailing list
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> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
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USRP-users mailing list
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Re: [USRP-users] FPGA compatibility
Moving to uhd-fpga and checking out 'ebf5eed' did the trick. Recompile the fpga. In working order again. Thank you for walking be through the rfnoc structure with respect to the git repos. I still think something is wrong with pybombs to cause this error in the first place. Corey On Wed, Oct 10, 2018 at 9:48 AM Rob Kossler wrote: > Perhaps the issue is related to pybombs. You mentioned that you > completely reinstalled via pybombs. I seem to recall that the pybombs > installation puts the fpga source into a folder called 'uhd-fpga' or > something like that. But, a manual UHD install puts the fpga source into a > folder called 'fpga-src'. Whatever folder you are using for the fpga > source needs to be on commit 'ebf5eed'. Maybe pybombs is simply checking > out 'master' for the fpga source code rather than following the appropriate > fpga commit that is associated with the uhd 'master'. > > > On Wed, Oct 10, 2018 at 10:16 AM Rob Kossler wrote: > >> I'm confused. If the 'fpga-src' folder is on commit 'ebf5eed', the >> compat number should be 35.1. It wasn't changed to 36.0 until the >> following commit. I'm pretty sure that I have built an fpga image from >> this source and that it ran fine with the uhd 'master' branch. >> >> Rob >> >> On Wed, Oct 10, 2018 at 8:41 AM Sylvain Munaut <246...@gmail.com> wrote: >> >>> > No dice, same ver 35 and 36 mismatch error. >>> >>> When looking at the commit you mention ( >>> 6af6ac32c30d2dc0efa6eab61e4a3920649e3e62 ), the expected compat number >>> is 35 : >>> >>> >>> https://github.com/EttusResearch/uhd/blob/master/host/lib/usrp/x300/x300_fw_common.h#L26 >>> >>> Looking at the latest FPGA sources on the maint branch, I see also >>> compat number 35 : >>> >>> >>> https://github.com/EttusResearch/fpga/blob/maint/usrp3/top/x300/bus_int.v#L104 >>> >>> So you should use the 'maint' branch of the FPGA sources. The latest >>> FPGA master seems to have some new down conversion logic for which the >>> UHD host code isn't published yet. >>> >>> >>> Cheers, >>> >>> Sylvain >>> >> ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] FPGA compatibility
Perhaps the issue is related to pybombs. You mentioned that you completely reinstalled via pybombs. I seem to recall that the pybombs installation puts the fpga source into a folder called 'uhd-fpga' or something like that. But, a manual UHD install puts the fpga source into a folder called 'fpga-src'. Whatever folder you are using for the fpga source needs to be on commit 'ebf5eed'. Maybe pybombs is simply checking out 'master' for the fpga source code rather than following the appropriate fpga commit that is associated with the uhd 'master'. On Wed, Oct 10, 2018 at 10:16 AM Rob Kossler wrote: > I'm confused. If the 'fpga-src' folder is on commit 'ebf5eed', the compat > number should be 35.1. It wasn't changed to 36.0 until the following > commit. I'm pretty sure that I have built an fpga image from this source > and that it ran fine with the uhd 'master' branch. > > Rob > > On Wed, Oct 10, 2018 at 8:41 AM Sylvain Munaut <246...@gmail.com> wrote: > >> > No dice, same ver 35 and 36 mismatch error. >> >> When looking at the commit you mention ( >> 6af6ac32c30d2dc0efa6eab61e4a3920649e3e62 ), the expected compat number >> is 35 : >> >> >> https://github.com/EttusResearch/uhd/blob/master/host/lib/usrp/x300/x300_fw_common.h#L26 >> >> Looking at the latest FPGA sources on the maint branch, I see also >> compat number 35 : >> >> >> https://github.com/EttusResearch/fpga/blob/maint/usrp3/top/x300/bus_int.v#L104 >> >> So you should use the 'maint' branch of the FPGA sources. The latest >> FPGA master seems to have some new down conversion logic for which the >> UHD host code isn't published yet. >> >> >> Cheers, >> >> Sylvain >> > ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] FPGA compatibility
I'm confused. If the 'fpga-src' folder is on commit 'ebf5eed', the compat number should be 35.1. It wasn't changed to 36.0 until the following commit. I'm pretty sure that I have built an fpga image from this source and that it ran fine with the uhd 'master' branch. Rob On Wed, Oct 10, 2018 at 8:41 AM Sylvain Munaut <246...@gmail.com> wrote: > > No dice, same ver 35 and 36 mismatch error. > > When looking at the commit you mention ( > 6af6ac32c30d2dc0efa6eab61e4a3920649e3e62 ), the expected compat number > is 35 : > > > https://github.com/EttusResearch/uhd/blob/master/host/lib/usrp/x300/x300_fw_common.h#L26 > > Looking at the latest FPGA sources on the maint branch, I see also > compat number 35 : > > > https://github.com/EttusResearch/fpga/blob/maint/usrp3/top/x300/bus_int.v#L104 > > So you should use the 'maint' branch of the FPGA sources. The latest > FPGA master seems to have some new down conversion logic for which the > UHD host code isn't published yet. > > > Cheers, > > Sylvain > ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] FPGA compatibility
> No dice, same ver 35 and 36 mismatch error. When looking at the commit you mention ( 6af6ac32c30d2dc0efa6eab61e4a3920649e3e62 ), the expected compat number is 35 : https://github.com/EttusResearch/uhd/blob/master/host/lib/usrp/x300/x300_fw_common.h#L26 Looking at the latest FPGA sources on the maint branch, I see also compat number 35 : https://github.com/EttusResearch/fpga/blob/maint/usrp3/top/x300/bus_int.v#L104 So you should use the 'maint' branch of the FPGA sources. The latest FPGA master seems to have some new down conversion logic for which the UHD host code isn't published yet. Cheers, Sylvain ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] FPGA compatibility
No dice, same ver 35 and 36 mismatch error. On Tue, Oct 9, 2018 at 9:35 PM Corey Hahn wrote: > Ok, I get it now. They are NOT suppose to match. Using the commands you > laid out put me on the right branch for fpga-src. Place and Route ing > again. > > Corey > > On Tue, Oct 9, 2018 at 9:27 PM Corey Hahn wrote: > >> They match. commit 6af6ac32 >> >> cah@snoke:~/rfnoc/src/uhd$ git log -1 >> commit 6af6ac32c30d2dc0efa6eab61e4a3920649e3e62 >> Author: Trung Tran >> Date: Fri Aug 3 09:12:55 2018 -0700 >> >> examples: add rfnoc_radio_loopback >> >> This example will allow an RF->RF loopback using RFNoC devices. >> cah@snoke:~/rfnoc/src/uhd$ cd fpga-src/ >> cah@snoke:~/rfnoc/src/uhd/fpga-src$ git log -1 >> commit 6af6ac32c30d2dc0efa6eab61e4a3920649e3e62 >> Author: Trung Tran >> Date: Fri Aug 3 09:12:55 2018 -0700 >> >> examples: add rfnoc_radio_loopback >> >> This example will allow an RF->RF loopback using RFNoC devices. >> >> I want to reiterate i have done nothing but rm -rf the old rfnoc and >> .pybombs folders and rerun the pybombs installer. >> >> Corey >> >> >> On Tue, Oct 9, 2018 at 11:23 AM Marcus Müller >> wrote: >> >>> Hey Corey, >>> >>> yep, when updating your UHD you also need to update your fpga-src >>> submodule; `git submodule update`. If you have changes you want to >>> preserve: Standard git methods apply; just make a branch in the fpga- >>> src submodule to contain your changes, then update the submodule, then >>> merge in your branch. >>> >>> Best regards, >>> Marcus >>> On Mon, 2018-10-08 at 19:42 -0600, Corey Hahn via USRP-users wrote: >>> > I did notice that UHD went from 4.0 to 3.14 is this a problem? Does >>> > the getting started wiki need an extra step to choose the >>> > branch/commit? >>> > >>> > On Mon, Oct 8, 2018 at 2:33 PM Rob Kossler wrote: >>> > > Perhaps you are using fpga-src on 'master' rather than on commit >>> > > 'ebf5eed' which is the one paired with UHD 'master'? >>> > > >>> > > Rob >>> > > >>> > > On Sun, Oct 7, 2018 at 10:22 PM Corey Hahn via USRP-users < >>> > > usrp-users@lists.ettus.com> wrote: >>> > > > Been using uhd/rfnoc for 9 months now with no comparability >>> > > > problems i couldn't fix. >>> > > > My last devel version was from the beginning of June. >>> > > > Upgraded rfnoc and rebuilt from scratch the pybombs rfnoc >>> > > > packages via the getting started wiki. >>> > > > I have an x310 USRP >>> > > > Redid the place and route with the new rfnoc build. Now i get >>> > > > the dreaded comparability mismatch. In the past this was fixed >>> > > > because i built the bit file or ran with uhd of two different >>> > > > versions. This is on one machine and should not have this >>> > > > problem. Where do i start debugging this problem? >>> > > > >>> > > > root@optical-cuda1604-20181007-srn21:~/rfnoc# uhd_usrp_probe >>> > > > [INFO] [UHD] linux; GNU C++ version 5.4.0 20160609; Boost_105800; >>> > > > UHD_3.14.0.0-110-g6af6ac32 >>> > > > [INFO] [X300] X300 initialization sequence... >>> > > > Error: RuntimeError: Expected FPGA compatibility number 35, but >>> > > > got 36: >>> > > > The FPGA image on your device is not compatible with this host >>> > > > code build. >>> > > > Download the appropriate FPGA images for this version of UHD. >>> > > > Please run: >>> > > > >>> > > > "/root/rfnoc/lib/uhd/utils/uhd_images_downloader.py" >>> > > > >>> > > > Then burn a new image to the on-board flash storage of your >>> > > > USRP X3xx device using the image loader utility. Use this >>> > > > command: >>> > > > >>> > > > "/root/rfnoc/bin/uhd_image_loader" -- >>> > > > args="type=x300,addr=192.168.40.2" >>> > > > >>> > > > For more information, refer to the UHD manual: >>> > > > >>> > > > http://files.ettus.com/manual/page_usrp_x3x0.html#x3x0_flash >>> > > > root@optical-cuda1604-20181007-srn21:~/rfnoc# >>> > > > >>> > > > ___ >>> > > > USRP-users mailing list >>> > > > USRP-users@lists.ettus.com >>> > > > >>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >>> > >>> > ___ >>> > USRP-users mailing list >>> > USRP-users@lists.ettus.com >>> > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >>> >>> ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] FPGA compatibility
They match. commit 6af6ac32 cah@snoke:~/rfnoc/src/uhd$ git log -1 commit 6af6ac32c30d2dc0efa6eab61e4a3920649e3e62 Author: Trung Tran Date: Fri Aug 3 09:12:55 2018 -0700 examples: add rfnoc_radio_loopback This example will allow an RF->RF loopback using RFNoC devices. cah@snoke:~/rfnoc/src/uhd$ cd fpga-src/ cah@snoke:~/rfnoc/src/uhd/fpga-src$ git log -1 commit 6af6ac32c30d2dc0efa6eab61e4a3920649e3e62 Author: Trung Tran Date: Fri Aug 3 09:12:55 2018 -0700 examples: add rfnoc_radio_loopback This example will allow an RF->RF loopback using RFNoC devices. I want to reiterate i have done nothing but rm -rf the old rfnoc and .pybombs folders and rerun the pybombs installer. Corey On Tue, Oct 9, 2018 at 11:23 AM Marcus Müller wrote: > Hey Corey, > > yep, when updating your UHD you also need to update your fpga-src > submodule; `git submodule update`. If you have changes you want to > preserve: Standard git methods apply; just make a branch in the fpga- > src submodule to contain your changes, then update the submodule, then > merge in your branch. > > Best regards, > Marcus > On Mon, 2018-10-08 at 19:42 -0600, Corey Hahn via USRP-users wrote: > > I did notice that UHD went from 4.0 to 3.14 is this a problem? Does > > the getting started wiki need an extra step to choose the > > branch/commit? > > > > On Mon, Oct 8, 2018 at 2:33 PM Rob Kossler wrote: > > > Perhaps you are using fpga-src on 'master' rather than on commit > > > 'ebf5eed' which is the one paired with UHD 'master'? > > > > > > Rob > > > > > > On Sun, Oct 7, 2018 at 10:22 PM Corey Hahn via USRP-users < > > > usrp-users@lists.ettus.com> wrote: > > > > Been using uhd/rfnoc for 9 months now with no comparability > > > > problems i couldn't fix. > > > > My last devel version was from the beginning of June. > > > > Upgraded rfnoc and rebuilt from scratch the pybombs rfnoc > > > > packages via the getting started wiki. > > > > I have an x310 USRP > > > > Redid the place and route with the new rfnoc build. Now i get > > > > the dreaded comparability mismatch. In the past this was fixed > > > > because i built the bit file or ran with uhd of two different > > > > versions. This is on one machine and should not have this > > > > problem. Where do i start debugging this problem? > > > > > > > > root@optical-cuda1604-20181007-srn21:~/rfnoc# uhd_usrp_probe > > > > [INFO] [UHD] linux; GNU C++ version 5.4.0 20160609; Boost_105800; > > > > UHD_3.14.0.0-110-g6af6ac32 > > > > [INFO] [X300] X300 initialization sequence... > > > > Error: RuntimeError: Expected FPGA compatibility number 35, but > > > > got 36: > > > > The FPGA image on your device is not compatible with this host > > > > code build. > > > > Download the appropriate FPGA images for this version of UHD. > > > > Please run: > > > > > > > > "/root/rfnoc/lib/uhd/utils/uhd_images_downloader.py" > > > > > > > > Then burn a new image to the on-board flash storage of your > > > > USRP X3xx device using the image loader utility. Use this > > > > command: > > > > > > > > "/root/rfnoc/bin/uhd_image_loader" -- > > > > args="type=x300,addr=192.168.40.2" > > > > > > > > For more information, refer to the UHD manual: > > > > > > > > http://files.ettus.com/manual/page_usrp_x3x0.html#x3x0_flash > > > > root@optical-cuda1604-20181007-srn21:~/rfnoc# > > > > > > > > ___ > > > > USRP-users mailing list > > > > USRP-users@lists.ettus.com > > > > > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com > > > > ___ > > USRP-users mailing list > > USRP-users@lists.ettus.com > > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com > > ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] FPGA compatibility
Hey Corey, yep, when updating your UHD you also need to update your fpga-src submodule; `git submodule update`. If you have changes you want to preserve: Standard git methods apply; just make a branch in the fpga- src submodule to contain your changes, then update the submodule, then merge in your branch. Best regards, Marcus On Mon, 2018-10-08 at 19:42 -0600, Corey Hahn via USRP-users wrote: > I did notice that UHD went from 4.0 to 3.14 is this a problem? Does > the getting started wiki need an extra step to choose the > branch/commit? > > On Mon, Oct 8, 2018 at 2:33 PM Rob Kossler wrote: > > Perhaps you are using fpga-src on 'master' rather than on commit > > 'ebf5eed' which is the one paired with UHD 'master'? > > > > Rob > > > > On Sun, Oct 7, 2018 at 10:22 PM Corey Hahn via USRP-users < > > usrp-users@lists.ettus.com> wrote: > > > Been using uhd/rfnoc for 9 months now with no comparability > > > problems i couldn't fix. > > > My last devel version was from the beginning of June. > > > Upgraded rfnoc and rebuilt from scratch the pybombs rfnoc > > > packages via the getting started wiki. > > > I have an x310 USRP > > > Redid the place and route with the new rfnoc build. Now i get > > > the dreaded comparability mismatch. In the past this was fixed > > > because i built the bit file or ran with uhd of two different > > > versions. This is on one machine and should not have this > > > problem. Where do i start debugging this problem? > > > > > > root@optical-cuda1604-20181007-srn21:~/rfnoc# uhd_usrp_probe > > > [INFO] [UHD] linux; GNU C++ version 5.4.0 20160609; Boost_105800; > > > UHD_3.14.0.0-110-g6af6ac32 > > > [INFO] [X300] X300 initialization sequence... > > > Error: RuntimeError: Expected FPGA compatibility number 35, but > > > got 36: > > > The FPGA image on your device is not compatible with this host > > > code build. > > > Download the appropriate FPGA images for this version of UHD. > > > Please run: > > > > > > "/root/rfnoc/lib/uhd/utils/uhd_images_downloader.py" > > > > > > Then burn a new image to the on-board flash storage of your > > > USRP X3xx device using the image loader utility. Use this > > > command: > > > > > > "/root/rfnoc/bin/uhd_image_loader" -- > > > args="type=x300,addr=192.168.40.2" > > > > > > For more information, refer to the UHD manual: > > > > > > http://files.ettus.com/manual/page_usrp_x3x0.html#x3x0_flash > > > root@optical-cuda1604-20181007-srn21:~/rfnoc# > > > > > > ___ > > > USRP-users mailing list > > > USRP-users@lists.ettus.com > > > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com > > ___ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] FPGA compatibility
I did notice that UHD went from 4.0 to 3.14 is this a problem? Does the getting started wiki need an extra step to choose the branch/commit? On Mon, Oct 8, 2018 at 2:33 PM Rob Kossler wrote: > Perhaps you are using fpga-src on 'master' rather than on commit 'ebf5eed' > which is the one paired with UHD 'master'? > > Rob > > On Sun, Oct 7, 2018 at 10:22 PM Corey Hahn via USRP-users < > usrp-users@lists.ettus.com> wrote: > >> Been using uhd/rfnoc for 9 months now with no comparability problems i >> couldn't fix. >> My last devel version was from the beginning of June. >> Upgraded rfnoc and rebuilt from scratch the pybombs rfnoc packages via >> the getting started wiki. >> I have an x310 USRP >> Redid the place and route with the new rfnoc build. Now i get the >> dreaded comparability mismatch. In the past this was fixed because i built >> the bit file or ran with uhd of two different versions. This is on one >> machine and should not have this problem. Where do i start debugging this >> problem? >> >> root@optical-cuda1604-20181007-srn21:~/rfnoc# uhd_usrp_probe >> [INFO] [UHD] linux; GNU C++ version 5.4.0 20160609; Boost_105800; >> UHD_3.14.0.0-110-g6af6ac32 >> [INFO] [X300] X300 initialization sequence... >> Error: RuntimeError: Expected FPGA compatibility number 35, but got 36: >> The FPGA image on your device is not compatible with this host code build. >> Download the appropriate FPGA images for this version of UHD. >> Please run: >> >> "/root/rfnoc/lib/uhd/utils/uhd_images_downloader.py" >> >> Then burn a new image to the on-board flash storage of your >> USRP X3xx device using the image loader utility. Use this command: >> >> "/root/rfnoc/bin/uhd_image_loader" --args="type=x300,addr=192.168.40.2" >> >> For more information, refer to the UHD manual: >> >> http://files.ettus.com/manual/page_usrp_x3x0.html#x3x0_flash >> root@optical-cuda1604-20181007-srn21:~/rfnoc# >> >> ___ >> USRP-users mailing list >> USRP-users@lists.ettus.com >> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com >> > ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
[USRP-users] FPGA compatibility
Been using uhd/rfnoc for 9 months now with no comparability problems i couldn't fix. My last devel version was from the beginning of June. Upgraded rfnoc and rebuilt from scratch the pybombs rfnoc packages via the getting started wiki. I have an x310 USRP Redid the place and route with the new rfnoc build. Now i get the dreaded comparability mismatch. In the past this was fixed because i built the bit file or ran with uhd of two different versions. This is on one machine and should not have this problem. Where do i start debugging this problem? root@optical-cuda1604-20181007-srn21:~/rfnoc# uhd_usrp_probe [INFO] [UHD] linux; GNU C++ version 5.4.0 20160609; Boost_105800; UHD_3.14.0.0-110-g6af6ac32 [INFO] [X300] X300 initialization sequence... Error: RuntimeError: Expected FPGA compatibility number 35, but got 36: The FPGA image on your device is not compatible with this host code build. Download the appropriate FPGA images for this version of UHD. Please run: "/root/rfnoc/lib/uhd/utils/uhd_images_downloader.py" Then burn a new image to the on-board flash storage of your USRP X3xx device using the image loader utility. Use this command: "/root/rfnoc/bin/uhd_image_loader" --args="type=x300,addr=192.168.40.2" For more information, refer to the UHD manual: http://files.ettus.com/manual/page_usrp_x3x0.html#x3x0_flash root@optical-cuda1604-20181007-srn21:~/rfnoc# ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
