[USRP-users] Question about testing or mocking

Hello USRP users! I'm in the process of writing code that reads from a USRP device. I'd like to make sure that I'm calling things like they are expected to be called, without having to connect and run against an actual device. Towards this end, I was about to start by writing my own "test"

Re: [USRP-users] A random phase offset

On 03/07/2018 12:04 PM, Hojoon Yang via USRP-users wrote: Hi, folks. In application note from Ettus, "Synchronization and MIMO Capability with USRP Devices", They said that "Generally, these fractional-N synthesizers introduce a random phase offset after each retune." What does "random

Re: [USRP-users] Single frequency interference for e310

Hi all, Do you give us some advice? thank you. best regards Jon 2018-03-06 11:48 GMT+08:00 liu Jong : > Hi all, > We test it with matlan2017b.But we don't think it does with softwere. > > best regards > Jon > > 2018-03-05 10:29 GMT+08:00 liu Jong :

[USRP-users] B210 - How much input power can its TX chains endure?

Hello, We are planning to use a B210 device in a project where there may be high power interferences. What would be the *maximum input power through a B210 RF output* to prevent damaging the device? (The AD9361 datasheet indicates an absolute maximum of 2.5 dBm for an RF input, but it does not

[USRP-users] [UHD] Notes on FPGA images packaging, and packaging in general

Hi all, we've had a bunch of great discussions on the packaging of FPGA images (binaries) and on packaging UHD in general. Since there were many different discussions, I'd like to summarize them all in one big email. Thanks to Rick, Maitland, and Phil for providing feedback. If you just use UHD

Re: [USRP-users] B210 - How much input power can its TX chains endure?

On 03/07/2018 06:29 PM, Brais Ares via USRP-users wrote: Hello, We are planning to use a B210 device in a project where there may be high power interferences. What would be the *maximum input power through a B210 RF _output_*__to prevent damaging the device? (The AD9361 datasheet indicates

Re: [USRP-users] Single frequency interference for e310

On 03/07/2018 08:07 PM, liu Jong via USRP-users wrote: Hi all, Do you give us some advice? thank you. best regards Jon This is pretty-much what electronics *DOES*. There will be harmonics of the master clock at some level, and only 5dB above the noise is actually really good. Unless each

Re: [USRP-users] OFDM TX/RX BER Calculator

Hi Michael, Thank you for your quick response! I wanted the payload to be QPSK modulated. I put a QT Range blocks in for the gain settings on the ofdm_tx and ofdm_rx flowgraphs. I still can’t seem to get any better than 20% BER though, but I think the advice about doing a PER calculator is

Re: [USRP-users] Single frequency interference for e310

Hi Marcus, Thank you for your help. 2018-03-08 10:37 GMT+08:00 Marcus D. Leech via USRP-users < usrp-users@lists.ettus.com>: > On 03/07/2018 08:07 PM, liu Jong via USRP-users wrote: > > Hi all, > Do you give us some advice? > thank you. > > best regards > Jon > > This is pretty-much what

[USRP-users] A random phase offset

Hi, folks.In application note from Ettus, "Synchronization and MIMO Capability with USRP Devices",They said that "Generally, these fractional-N synthesizers introduce a random phase offset after each retune."What does "random phase offset" mean?Q1. Does it mean that if I send a signal,