Hi Derek,
thank you for your answer. My answers are below.
Il 15/06/18 13:08, Derek Kozel ha scritto:
Hello Alice,
I think you have two different issues. You should not be encountering
Late errors. How do you schedule your timed commands? What connection
to the host computer are you using?
Hello Alice,
I think you have two different issues. You should not be encountering Late
errors. How do you schedule your timed commands? What connection to the
host computer are you using? 10 GigE should be able to handle 100 MS/s, are
you using 1 GigE?
Separately, there will always be a phase
Hello Lucas,
The E310's ethernet connection is directly linked to the ARM side of the
processor so it is not possible to directly stream samples to the host. We
do have an application note describing how to forward samples to and from a
host computer from the E310.
Hello all,
I am wondering if there is any way tested to transmit samples from Ettus
E310 to an external host to process them.
Two options in mind:
1. Transmit samples by Ethernet interface.
2. Bypass samples directly from the FPGA.
Thanks.
___
Hello Dr Henarejos,
The N310 has the same level of RFNoC support as the X310, the same blocks
can be used on either. They use a common architecture so the structure and
properties are essentially unchanged. The uhd_image_builder is in the
process of having N310 support added, that should be
Hello Alice,
A single 10 GigE connection should be able to carry two channels of 100
MS/s. Here is a link to some advice for tuning the Ethernet performance of
your computer.
http://files.ettus.com/manual/page_transport.html
Your current program has no use of timed commands so the phase offset
