Re: [USRP-users] X300 XG Image Broken

[Martin Braun via USRP-users]

On 07/12/2018 03:24 PM, Jacob Knoles via USRP-users wrote:
> Hey all, 
> 
> I have built the latest version of UHD and am trying to load up my X300
> but having major issues. 
> I have used the image downloader script to get the latest versions of
> the FPGA image and the image loader to burn the image successfully. Then
> when I run uhd_usrp_probe I get to the DDC initialization and it breaks. 
> 
> PS C:\Program Files\UHD\bin> uhd_image_loader.exe --args
> "type=x300,addr=192.168.40.2"
> [INFO] [UHD] Win32; Microsoft Visual C++ version 14.1; Boost_106700;
> UHD_3.12.0.0-69-ON
> Unit: USRP X300 (3123DBD, 192.168.40.2)
> FPGA Image: C:\Program Files\UHD\share\uhd\images\usrp_x300_fpga_XG.bit
> -- Initializing FPGA loading...successful.
> -- Loading XG FPGA image: 100% (87/87 sectors)
> -- Finalizing image load...successful.
> Power-cycle the USRP X300 to use the new image.
> PS C:\Program Files\UHD\bin> .\uhd_usrp_probe.exe
> [INFO] [UHD] Win32; Microsoft Visual C++ version 14.1; Boost_106700;
> UHD_3.12.0.0-69-ON
> [INFO] [X300] X300 initialization sequence...
> [INFO] [X300] Maximum frame size: 8000 bytes.
> [INFO] [X300] Radio 1x clock: 200 MHz
> [INFO] [GPS] No GPSDO found
> [INFO] [0/DmaFIFO_0] Initializing block control (NOC ID: 0xF1F0D000)
> [INFO] [0/DmaFIFO_0] BIST passed (Throughput: 1304 MB/s)
> [INFO] [0/DmaFIFO_0] BIST passed (Throughput: 1318 MB/s)
> [INFO] [0/Radio_0] Initializing block control (NOC ID: 0x12AD1001)
> [INFO] [0/Radio_1] Initializing block control (NOC ID: 0x12AD1001)
> [INFO] [0/DDC_0] Initializing block control (NOC ID: 0xDDC0)
> Error: LookupError: KeyError: Unknown settings register name: DDS_FREQ
> 
> I've tried reloading the image several times. Power cycling the x300,
> downloading the most recent images zip from ettus.com 
> nothing is working. 
> 
> Windows 10, UHD 12.0.0, Boost 1.67 Connected using dual 10g

Jacob,

this is not an issue with the FPGA image, but you have a mismatch
between the XML block descriptors and your UHD version. Your UHD version
is newer than the XML files. If you run UHD with a higher verbosity, you
can see where it is getting the XML files from.

-- M

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[USRP-users] X300 XG Image Broken

[Jacob Knoles via USRP-users]

Hey all,

I have built the latest version of UHD and am trying to load up my X300 but
having major issues.
I have used the image downloader script to get the latest versions of the
FPGA image and the image loader to burn the image successfully. Then when I
run uhd_usrp_probe I get to the DDC initialization and it breaks.

PS C:\Program Files\UHD\bin> uhd_image_loader.exe --args
"type=x300,addr=192.168.40.2"
[INFO] [UHD] Win32; Microsoft Visual C++ version 14.1; Boost_106700;
UHD_3.12.0.0-69-ON
Unit: USRP X300 (3123DBD, 192.168.40.2)
FPGA Image: C:\Program Files\UHD\share\uhd\images\usrp_x300_fpga_XG.bit
-- Initializing FPGA loading...successful.
-- Loading XG FPGA image: 100% (87/87 sectors)
-- Finalizing image load...successful.
Power-cycle the USRP X300 to use the new image.
PS C:\Program Files\UHD\bin> .\uhd_usrp_probe.exe
[INFO] [UHD] Win32; Microsoft Visual C++ version 14.1; Boost_106700;
UHD_3.12.0.0-69-ON
[INFO] [X300] X300 initialization sequence...
[INFO] [X300] Maximum frame size: 8000 bytes.
[INFO] [X300] Radio 1x clock: 200 MHz
[INFO] [GPS] No GPSDO found
[INFO] [0/DmaFIFO_0] Initializing block control (NOC ID: 0xF1F0D000)
[INFO] [0/DmaFIFO_0] BIST passed (Throughput: 1304 MB/s)
[INFO] [0/DmaFIFO_0] BIST passed (Throughput: 1318 MB/s)
[INFO] [0/Radio_0] Initializing block control (NOC ID: 0x12AD1001)
[INFO] [0/Radio_1] Initializing block control (NOC ID: 0x12AD1001)
[INFO] [0/DDC_0] Initializing block control (NOC ID: 0xDDC0)
Error: LookupError: KeyError: Unknown settings register name: DDS_FREQ

I've tried reloading the image several times. Power cycling the x300,
downloading the most recent images zip from ettus.com nothing is working.

Windows 10, UHD 12.0.0, Boost 1.67 Connected using dual 10g

-
Jacob Knoles
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