Re: [PATCH v3 42/75] x86/sev-es: Setup GHCB based boot #VC handler

2020-06-11 Thread Joerg Roedel
On Thu, Jun 04, 2020 at 05:30:27PM +0200, Borislav Petkov wrote: > Hmmkay, I see vc_no_ghcb doing > > calldo_vc_no_ghcb > > and that's setup in early_idt_setup(). > > vc_boot_ghcb(), OTOH, is called by do_early_exception() only so that one > could be called handle_vc_boot_ghcb(), no? I.e.,

Re: [PATCH v3 42/75] x86/sev-es: Setup GHCB based boot #VC handler

2020-06-04 Thread Borislav Petkov
On Thu, Jun 04, 2020 at 02:07:49PM +0200, Joerg Roedel wrote: > This are IDT entry points and the names above follow the convention for > them, like e.g. 'page_fault', 'nmi' or 'general_protection'. Should I > still add the verbs or just add a comment explaining what those symbols > are? Hmmkay,

Re: [PATCH v3 42/75] x86/sev-es: Setup GHCB based boot #VC handler

2020-06-04 Thread Joerg Roedel
On Wed, May 20, 2020 at 09:22:30PM +0200, Borislav Petkov wrote: > On Tue, Apr 28, 2020 at 05:16:52PM +0200, Joerg Roedel wrote: > > diff --git a/arch/x86/include/asm/sev-es.h b/arch/x86/include/asm/sev-es.h > > index b2cbcd40b52e..e1ed963a57ec 100644 > > --- a/arch/x86/include/asm/sev-es.h > >

Re: [PATCH v3 42/75] x86/sev-es: Setup GHCB based boot #VC handler

2020-05-20 Thread Borislav Petkov
On Tue, Apr 28, 2020 at 05:16:52PM +0200, Joerg Roedel wrote: > diff --git a/arch/x86/include/asm/sev-es.h b/arch/x86/include/asm/sev-es.h > index b2cbcd40b52e..e1ed963a57ec 100644 > --- a/arch/x86/include/asm/sev-es.h > +++ b/arch/x86/include/asm/sev-es.h > @@ -74,5 +74,6 @@ static inline u64

[PATCH v3 42/75] x86/sev-es: Setup GHCB based boot #VC handler

2020-04-28 Thread Joerg Roedel
From: Joerg Roedel Add the infrastructure to handle #VC exceptions when the kernel runs on virtual addresses and has a GHCB mapped. This handler will be used until the runtime #VC handler takes over. Signed-off-by: Joerg Roedel --- arch/x86/include/asm/segment.h | 2 +-