On Wed, Sep 20, 2017 at 09:11:57AM +, Liang, Cunming wrote:
> Hi Michael,
>
> > -Original Message-
> > From: virtio-...@lists.oasis-open.org
> > [mailto:virtio-...@lists.oasis-open.org]
> > On Behalf Of Michael S. Tsirkin
> > Sent: Sunday, September 10, 2017 1:06 PM
> > To:
On 09/25/2017 07:54 PM, Halil Pasic wrote:
>
>
> On 09/25/2017 04:45 PM, Thomas Huth wrote:
>> There is no recent user space application available anymore which still
>> supports this old virtio transport, so let's disable this by default.
>>
>> Signed-off-by: Thomas Huth
>
On 09/25/2017 04:45 PM, Thomas Huth wrote:
> There is no recent user space application available anymore which still
> supports this old virtio transport, so let's disable this by default.
>
> Signed-off-by: Thomas Huth
I don't have any objections, but there may be something
On Mon, Sep 25, 2017 at 12:44:52PM +0800, Wei Wang wrote:
> This patch series enables the Last Branch Recording feature for the
> guest. Instead of trapping each LBR stack MSR access, the MSRs are
> passthroughed to the guest. Those MSRs are switched (i.e. load and
> saved) on VMExit and VMEntry.
On 09/25/2017 09:59 AM, Juergen Gross wrote:
> Ping?
>
> On 06/09/17 19:36, Juergen Gross wrote:
>> With virt_spin_lock() being guarded by a static key the bare metal case
>> can be optimized by patching the call away completely. In case a kernel
>> running as a guest it can decide whether to use
On 21/09/17 07:41, Tian, Kevin wrote:
>> From: Jean-Philippe Brucker [mailto:jean-philippe.bruc...@arm.com]
>> Sent: Wednesday, September 6, 2017 7:49 PM
>>
>>
>>> 2.6.8.2.1
>>> Multiple overlapping RESV_MEM properties are merged together. Device
>>> requirement? if same types I assume?
>>
>>
On 21/09/17 07:27, Tian, Kevin wrote:
>> From: Jean-Philippe Brucker
>> Sent: Wednesday, September 6, 2017 7:55 PM
>>
>> Hi Kevin,
>>
>> On 28/08/17 08:39, Tian, Kevin wrote:
>>> Here comes some comments:
>>>
>>> 1.1 Motivation
>>>
>>> You describe I/O page faults handling as future work. Seems
On 09/25/2017 07:54 PM, Paolo Bonzini wrote:
On 25/09/2017 06:44, Wei Wang wrote:
+static void update_msr_autoload_count_max(void)
+{
+ u64 vmx_msr;
+ int n;
+
+ /*
+* According to the Intel SDM, if Bits 27:25 of MSR_IA32_VMX_MISC is
+* n, then (n + 1) * 512
On 09/25/2017 05:16 PM, Paolo Bonzini wrote:
On 25/09/2017 06:44, Wei Wang wrote:
Passthrough the LBR stack to the guest, and auto switch the stack MSRs
upon VMEntry and VMExit.
Signed-off-by: Wei Wang
This has to be enabled separately for each guest, because it may
On 25/09/2017 06:44, Wei Wang wrote:
> Passthrough the MSR_IA32_DEBUGCTLMSR to the guest, and take advantage of
> the hardware VT-x feature to auto switch the msr upon VMExit and VMEntry.
I think most bits in the MSR should not be passed through (for example
FREEZE_WHILE_SMM_EN,
On 25/09/2017 06:44, Wei Wang wrote:
>
> +static void update_msr_autoload_count_max(void)
> +{
> + u64 vmx_msr;
> + int n;
> +
> + /*
> + * According to the Intel SDM, if Bits 27:25 of MSR_IA32_VMX_MISC is
> + * n, then (n + 1) * 512 is the recommended max number of MSRs to
On 25/09/2017 06:44, Wei Wang wrote:
> Passthrough the LBR stack to the guest, and auto switch the stack MSRs
> upon VMEntry and VMExit.
>
> Signed-off-by: Wei Wang
This has to be enabled separately for each guest, because it may prevent
live migration to hosts with a
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