Re: [PATCH v11 0/2] s390: virtio: let arch validate VIRTIO features

2020-09-07 Thread Halil Pasic
On Mon, 7 Sep 2020 11:39:05 +0200 Pierre Morel wrote: > Hi all, > > The goal of the series is to give a chance to the architecture > to validate VIRTIO device features. Michael, is this going in via your tree? ___ Virtualization mailing list

Re: [PATCH v11 1/2] virtio: let arch advertise guest's memory access restrictions

2020-09-07 Thread Halil Pasic
On Mon, 7 Sep 2020 11:39:06 +0200 Pierre Morel wrote: > An architecture may restrict host access to guest memory, > e.g. IBM s390 Secure Execution or AMD SEV. > > Provide a new Kconfig entry the architecture can select, > CONFIG_ARCH_HAS_RESTRICTED_VIRTIO_MEMORY_ACCESS, when it provides > the

Re: [PATCH v11 2/2] s390: virtio: PV needs VIRTIO I/O device protection

2020-09-07 Thread Halil Pasic
On Mon, 7 Sep 2020 11:39:07 +0200 Pierre Morel wrote: > If protected virtualization is active on s390, VIRTIO has only retricted > access to the guest memory. > Define CONFIG_ARCH_HAS_RESTRICTED_VIRTIO_MEMORY_ACCESS and export > arch_has_restricted_virtio_memory_access to advertize VIRTIO if

Re: [PATCH v7 36/72] x86/sev-es: Add SEV-ES Feature Detection

2020-09-07 Thread Borislav Petkov
On Mon, Sep 07, 2020 at 03:15:37PM +0200, Joerg Roedel wrote: > @@ -347,7 +348,13 @@ bool sme_active(void) > > bool sev_active(void) > { > - return sme_me_mask && sev_enabled; > + return !!(sev_status & MSR_AMD64_SEV_ENABLED); Dropped those "!!" here too while applying. --

Re: [PATCH] i2c: virtio: add a virtio i2c frontend driver

2020-09-07 Thread Jie Deng
On 2020/9/7 13:40, Jason Wang wrote: +struct virtio_i2c_msg { +    struct virtio_i2c_hdr hdr; +    char *buf; +    u8 status; Any reason for separating status out of virtio_i2c_hdr? The status is not from i2c_msg. You meant ic2_hdr? You embed status in virtio_i2c_msg anyway.

[PATCH v3 2/2] drm/virtio: set max_segment

2020-09-07 Thread Gerd Hoffmann
When initializing call virtio_max_dma_size() to figure the scatter list limit. Needed to make virtio-gpu work properly with SEV. v2: place max_segment in drm driver not gem object. Signed-off-by: Gerd Hoffmann --- drivers/gpu/drm/virtio/virtgpu_kms.c | 1 + 1 file changed, 1 insertion(+)

[PATCH] vhost-vdpa: fix backend feature ioctls

2020-09-07 Thread Jason Wang
Commit 653055b9acd4 ("vhost-vdpa: support get/set backend features") introduces two malfunction backend features ioctls: 1) the ioctls was blindly added to vring ioctl instead of vdpa device ioctl 2) vhost_set_backend_features() was called when dev mutex has already been held which will

Re: [PATCH] vdpa/mlx5: Setup driver only if VIRTIO_CONFIG_S_DRIVER_OK

2020-09-07 Thread Michael S. Tsirkin
On Mon, Sep 07, 2020 at 10:51:36AM +0300, Eli Cohen wrote: > If the memory map changes before the driver status is > VIRTIO_CONFIG_S_DRIVER_OK, don't attempt to create resources because it > may fail. For example, if the VQ is not ready there is no point in > creating resources. > > Fixes:

[PATCH v11 0/2] s390: virtio: let arch validate VIRTIO features

2020-09-07 Thread Pierre Morel
Hi all, The goal of the series is to give a chance to the architecture to validate VIRTIO device features. The tests are back to virtio_finalize_features. No more argument for the architecture callback which only reports if the architecture needs guest memory access restrictions for VIRTIO. I

[PATCH v11 1/2] virtio: let arch advertise guest's memory access restrictions

2020-09-07 Thread Pierre Morel
An architecture may restrict host access to guest memory, e.g. IBM s390 Secure Execution or AMD SEV. Provide a new Kconfig entry the architecture can select, CONFIG_ARCH_HAS_RESTRICTED_VIRTIO_MEMORY_ACCESS, when it provides the arch_has_restricted_virtio_memory_access callback to advertise to

[PATCH v11 2/2] s390: virtio: PV needs VIRTIO I/O device protection

2020-09-07 Thread Pierre Morel
If protected virtualization is active on s390, VIRTIO has only retricted access to the guest memory. Define CONFIG_ARCH_HAS_RESTRICTED_VIRTIO_MEMORY_ACCESS and export arch_has_restricted_virtio_memory_access to advertize VIRTIO if that's the case, preventing a host error on access attempt.

Re: [PATCH] vdpa/mlx5: Setup driver only if VIRTIO_CONFIG_S_DRIVER_OK

2020-09-07 Thread Jason Wang
- Original Message - > If the memory map changes before the driver status is > VIRTIO_CONFIG_S_DRIVER_OK, don't attempt to create resources because it > may fail. For example, if the VQ is not ready there is no point in > creating resources. > > Fixes: 1a86b377aa21 ("vdpa/mlx5: Add

Re: [PATCH v7 19/72] x86/boot/compressed/64: Add stage1 #VC handler

2020-09-07 Thread Borislav Petkov
On Mon, Sep 07, 2020 at 03:15:20PM +0200, Joerg Roedel wrote: > +static inline u64 sev_es_rd_ghcb_msr(void) > +{ > + unsigned long low, high; > + > + asm volatile("rdmsr\n" : "=a" (low), "=d" (high) : > + "c" (MSR_AMD64_SEV_ES_GHCB)); > + > + return ((high << 32) |

[PATCH v7 37/72] x86/sev-es: Print SEV-ES info into kernel log

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Refactor the message printed to the kernel log which indicates whether SEV or SME is active to print a list of enabled encryption features. This will scale better in the future when more memory encryption features might be added. Also add SEV-ES to the list of features.

[PATCH v7 21/72] x86/boot/compressed/64: Check return value of kernel_ident_mapping_init()

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel The function can fail to create an identity mapping, check for that and bail out if it happens. Signed-off-by: Joerg Roedel --- arch/x86/boot/compressed/ident_map_64.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git

[PATCH v7 29/72] x86/head/64: Install startup GDT

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Handling exceptions during boot requires a working GDT. The kernel GDT can't be used on the direct mapping, so load a startup GDT and setup segments. Signed-off-by: Joerg Roedel --- arch/x86/include/asm/setup.h | 1 + arch/x86/kernel/head64.c | 33

[PATCH v7 05/72] x86/cpufeatures: Add SEV-ES CPU feature

2020-09-07 Thread Joerg Roedel
From: Tom Lendacky Add CPU feature detection for Secure Encrypted Virtualization with Encrypted State. This feature enhances SEV by also encrypting the guest register state, making it in-accessible to the hypervisor. Signed-off-by: Tom Lendacky Signed-off-by: Joerg Roedel ---

[PATCH v7 24/72] x86/boot/compressed/64: Unmap GHCB page before booting the kernel

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Force a page-fault on any further accesses to the GHCB page when they shouldn't happen anymore. This will catch the bugs where a #VC exception is raised when no one is expected anymore. Signed-off-by: Joerg Roedel --- arch/x86/boot/compressed/ident_map_64.c | 17

[PATCH v7 01/72] KVM: SVM: nested: Don't allocate VMCB structures on stack

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Do not allocate a vmcb_control_area and a vmcb_save_area on the stack, as these structures will become larger with future extenstions of SVM and thus the svm_set_nested_state() function will become a too large stack frame. Signed-off-by: Joerg Roedel ---

[PATCH v7 23/72] x86/boot/compressed/64: Setup GHCB Based VC Exception handler

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Install an exception handler for #VC exception that uses a GHCB. Also add the infrastructure for handling different exit-codes by decoding the instruction that caused the exception and error handling. Signed-off-by: Joerg Roedel --- arch/x86/Kconfig

[PATCH v7 04/72] KVM: SVM: Use __packed shorthand

2020-09-07 Thread Joerg Roedel
From: Borislav Petkov Use the shorthand to make it more readable. No functional changes. Signed-off-by: Borislav Petkov Signed-off-by: Joerg Roedel --- arch/x86/include/asm/svm.h | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/svm.h

[PATCH v7 18/72] x86/boot/compressed/64: Change add_identity_map() to take start and end

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Changing the function to take start and end as parameters instead of start and size simplifies the callers, which don't need to calculate the size if they already have start and end. Signed-off-by: Joerg Roedel Reviewed-by: Kees Cook ---

[PATCH v7 15/72] x86/boot/compressed/64: Add page-fault handler

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Install a page-fault handler to add an identity mapping to addresses not yet mapped. Also do some checking whether the error code is sane. This makes non SEV-ES machines use the exception handling infrastructure in the pre-decompressions boot code too, making it less likely

[PATCH v7 06/72] x86/traps: Move pf error codes to

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Move the definition of the x86 page-fault error code bits to the new header file asm/trap_pf.h. This makes it easier to include them into pre-decompression boot code. No functional changes. Signed-off-by: Joerg Roedel --- arch/x86/include/asm/trap_pf.h | 24

[PATCH v7 27/72] x86/sev-es: Add CPUID handling to #VC handler

2020-09-07 Thread Joerg Roedel
From: Tom Lendacky Handle #VC exceptions caused by CPUID instructions. These happen in early boot code when the KASLR code checks for RDTSC. Signed-off-by: Tom Lendacky [ jroe...@suse.de: Adapt to #VC handling framework ] Co-developed-by: Joerg Roedel Signed-off-by: Joerg Roedel ---

[PATCH v7 07/72] x86/insn: Make inat-tables.c suitable for pre-decompression code

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel The inat-tables.c file has some arrays in it that contain pointers to other arrays. These pointers need to be relocated when the kernel image is moved to a different location. The pre-decompression boot-code has no support for applying ELF relocations, so initialize these

[PATCH v7 10/72] x86/insn: Add insn_get_modrm_reg_off()

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Add a function to the instruction decoder which returns the pt_regs offset of the register specified in the reg field of the modrm byte. Signed-off-by: Joerg Roedel Acked-by: Masami Hiramatsu --- arch/x86/include/asm/insn-eval.h | 1 + arch/x86/lib/insn-eval.c |

[PATCH v7 13/72] x86/boot/compressed/64: Add IDT Infrastructure

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Add code needed to setup an IDT in the early pre-decompression boot-code. The IDT is loaded first in startup_64, which is after EfiExitBootServices() has been called, and later reloaded when the kernel image has been relocated to the end of the decompression area. This allows

[PATCH v7 00/72] x86: SEV-ES Guest Support

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Hi, here is a new version of the SEV-ES Guest Support patches for x86. The previous versions can be found as a linked list starting here: https://lore.kernel.org/lkml/20200824085511.7553-1-j...@8bytes.org/ I updated the patch-set based on ther review comments I got

[PATCH v7 33/72] x86/head/64: Install a CPU bringup IDT

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Add a separate bringup IDT used by CPU bringup code that will be used until the kernel switches to the idt_table. There are two reasons for a separate IDT: 1) When the idt_table is set up and the secondary CPUs are booted, it contains entries (e.g. IST

[PATCH v7 02/72] KVM: SVM: Add GHCB definitions

2020-09-07 Thread Joerg Roedel
From: Tom Lendacky Extend the vmcb_safe_area with SEV-ES fields and add a new 'struct ghcb' which will be used for guest-hypervisor communication. Signed-off-by: Tom Lendacky Signed-off-by: Joerg Roedel --- arch/x86/include/asm/svm.h | 51 --

[PATCH v7 17/72] x86/boot/compressed/64: Don't pre-map memory in KASLR code

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel With the page-fault handler in place the identity mapping can be built on-demand. So remove the code which manually creates the mappings and unexport/remove the functions used for it. Signed-off-by: Joerg Roedel Reviewed-by: Kees Cook ---

[PATCH v7 14/72] x86/boot/compressed/64: Rename kaslr_64.c to ident_map_64.c

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel The file contains only code related to identity mapped page-tables. Rename the file and compile it always in. Signed-off-by: Joerg Roedel Reviewed-by: Kees Cook --- arch/x86/boot/compressed/Makefile | 2 +- arch/x86/boot/compressed/{kaslr_64.c =>

[PATCH v7 12/72] x86/boot/compressed/64: Disable red-zone usage

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel The x86-64 ABI defines a red-zone on the stack: The 128-byte area beyond the location pointed to by %rsp is considered to be reserved and shall not be modified by signal or interrupt handlers. Therefore, functions may use this area for temporary data that is not

[PATCH v7 08/72] x86/umip: Factor out instruction fetch

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Factor out the code to fetch the instruction from user-space to a helper function. No functional changes. Signed-off-by: Joerg Roedel --- arch/x86/include/asm/insn-eval.h | 2 ++ arch/x86/kernel/umip.c | 26 +- arch/x86/lib/insn-eval.c

[PATCH v7 31/72] x86/head/64: Load segment registers earlier

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Make sure segments are properly set up before setting up an IDT and doing anything that might cause a #VC exception. This is later needed for early exception handling. Signed-off-by: Joerg Roedel Reviewed-by: Kees Cook --- arch/x86/kernel/head_64.S | 52

[PATCH v7 11/72] x86/insn: Add insn_has_rep_prefix() helper

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Add a function to check whether an instruction has a REP prefix. Signed-off-by: Joerg Roedel Reviewed-by: Masami Hiramatsu --- arch/x86/include/asm/insn-eval.h | 1 + arch/x86/lib/insn-eval.c | 24 2 files changed, 25 insertions(+) diff

[PATCH v7 26/72] x86/fpu: Move xgetbv()/xsetbv() into separate header

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel The xgetbv() function is needed in pre-decompression boot code, but asm/fpu/internal.h can't be included there directly. Doing so opens the door to include-hell due to various include-magic in boot/compressed/misc.h. Avoid that by moving xgetbv()/xsetbv() to a separate header

[PATCH v7 09/72] x86/umip: Factor out instruction decoding

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Factor out the code used to decode an instruction with the correct address and operand sizes to a helper function. No functional changes. Signed-off-by: Joerg Roedel --- arch/x86/include/asm/insn-eval.h | 2 ++ arch/x86/kernel/umip.c | 23 +---

[PATCH v7 41/72] x86/sev-es: Setup per-cpu GHCBs for the runtime handler

2020-09-07 Thread Joerg Roedel
From: Tom Lendacky The runtime handler needs a GHCB per CPU. Set them up and map them unencrypted. Signed-off-by: Tom Lendacky Signed-off-by: Joerg Roedel --- arch/x86/include/asm/mem_encrypt.h | 2 ++ arch/x86/kernel/sev-es.c | 56 +-

[PATCH v7 72/72] x86/sev-es: Check required CPU features for SEV-ES

2020-09-07 Thread Joerg Roedel
From: Martin Radev Make sure the machine supports RDRAND, otherwise there is no trusted source of of randomness in the system. To also check this in the pre-decompression stage, make has_cpuflag not depend on CONFIG_RANDOMIZE_BASE anymore. Signed-off-by: Martin Radev Signed-off-by: Joerg

[PATCH v7 57/72] x86/sev-es: Handle MONITOR/MONITORX Events

2020-09-07 Thread Joerg Roedel
From: Tom Lendacky Implement a handler for #VC exceptions caused by MONITOR and MONITORX instructions. Signed-off-by: Tom Lendacky [ jroe...@suse.de: Adapt to #VC handling infrastructure ] Co-developed-by: Joerg Roedel Signed-off-by: Joerg Roedel --- arch/x86/kernel/sev-es.c | 13

[PATCH v7 61/72] x86/sev-es: Handle #DB Events

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Handle #VC exceptions caused by #DB exceptions in the guest. Those must be handled outside of instrumentation_begin()/end() so that the handler will not be raised recursively. Handle them by calling the kernels debug exception handler. Signed-off-by: Joerg Roedel ---

[PATCH v7 53/72] x86/sev-es: Handle WBINVD Events

2020-09-07 Thread Joerg Roedel
From: Tom Lendacky Implement a handler for #VC exceptions caused by WBINVD instructions. Signed-off-by: Tom Lendacky [ jroe...@suse.de: Adapt to #VC handling framework ] Co-developed-by: Joerg Roedel Signed-off-by: Joerg Roedel --- arch/x86/kernel/sev-es.c | 9 + 1 file changed, 9

[PATCH v7 51/72] x86/sev-es: Handle MSR events

2020-09-07 Thread Joerg Roedel
From: Tom Lendacky Implement a handler for #VC exceptions caused by RDMSR/WRMSR instructions. Signed-off-by: Tom Lendacky [ jroe...@suse.de: Adapt to #VC handling infrastructure ] Co-developed-by: Joerg Roedel Signed-off-by: Joerg Roedel --- arch/x86/kernel/sev-es.c | 28

[PATCH v7 68/72] x86/head/64: Don't call verify_cpu() on starting APs

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel The APs are not ready to handle exceptions when verify_cpu() is called in secondary_startup_64. Signed-off-by: Joerg Roedel Reviewed-by: Kees Cook --- arch/x86/include/asm/realmode.h | 1 + arch/x86/kernel/head_64.S | 12 arch/x86/realmode/init.c

[PATCH v7 63/72] x86/kvm: Add KVM specific VMMCALL handling under SEV-ES

2020-09-07 Thread Joerg Roedel
From: Tom Lendacky Implement the callbacks to copy the processor state required by KVM to the GHCB. Signed-off-by: Tom Lendacky [ jroe...@suse.de: - Split out of a larger patch - Adapt to different callback functions ] Co-developed-by: Joerg Roedel Signed-off-by: Joerg

[PATCH v7 40/72] x86/sev-es: Setup GHCB based boot #VC handler

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Add the infrastructure to handle #VC exceptions when the kernel runs on virtual addresses and has a GHCB mapped. This handler will be used until the runtime #VC handler takes over. Since the handler runs very early, disable instrumentation for sev-es.c. Signed-off-by: Joerg

[PATCH v7 44/72] x86/dumpstack/64: Add noinstr version of get_stack_info()

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel The get_stack_info functionality is needed in the entry code for the #VC exception handler. Provide a version of it in the .text.noinstr section which can be called safely from there. Signed-off-by: Joerg Roedel --- arch/x86/include/asm/stacktrace.h | 2 ++

[PATCH v7 69/72] x86/sev-es: Support CPU offline/online

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Add a play_dead handler when running under SEV-ES. This is needed because the hypervisor can't deliver an SIPI request to restart the AP. Instead the kernel has to issue a VMGEXIT to halt the VCPU until the hypervisor wakes it up again. Signed-off-by: Joerg Roedel ---

[PATCH v7 45/72] x86/entry/64: Add entry code for #VC handler

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel The #VC handler needs special entry code because: 1. It runs on an IST stack 2. It needs to be able to handle nested #VC exceptions To make this work the entry code is implemented to pretend it doesn't use an IST stack. When entered from user-mode or early

[PATCH v7 71/72] x86/efi: Add GHCB mappings when SEV-ES is active

2020-09-07 Thread Joerg Roedel
From: Tom Lendacky Calling down to EFI runtime services can result in the firmware performing VMGEXIT calls. The firmware is likely to use the GHCB of the OS (e.g., for setting EFI variables), so each GHCB in the system needs to be identity mapped in the EFI page tables, as unencrypted, to avoid

[PATCH v7 59/72] x86/sev-es: Handle VMMCALL Events

2020-09-07 Thread Joerg Roedel
From: Tom Lendacky Implement a handler for #VC exceptions caused by VMMCALL instructions. This patch is only a starting point, VMMCALL emulation under SEV-ES needs further hypervisor-specific changes to provide additional state. Signed-off-by: Tom Lendacky [ jroe...@suse.de: Adapt to #VC

[PATCH v7 66/72] x86/realmode: Setup AP jump table

2020-09-07 Thread Joerg Roedel
From: Tom Lendacky As part of the GHCB specification, the booting of APs under SEV-ES requires an AP jump table when transitioning from one layer of code to another (e.g. when going from UEFI to the OS). As a result, each layer that parks an AP must provide the physical address of an AP jump

[PATCH v7 43/72] x86/sev-es: Adjust #VC IST Stack on entering NMI handler

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel When an NMI hits in the #VC handler entry code before it switched to another stack, any subsequent #VC exception in the NMI code-path will overwrite the interrupted #VC handlers stack. Make sure this doesn't happen by explicitly adjusting the #VC IST entry in the NMI handler

[PATCH v7 52/72] x86/sev-es: Handle DR7 read/write events

2020-09-07 Thread Joerg Roedel
From: Tom Lendacky Add code to handle #VC exceptions on DR7 register reads and writes. This is needed early because show_regs() reads DR7 to print it out. Under SEV-ES there is currently no support for saving/restoring the DRx registers, but software expects to be able to write to the DR7

[PATCH v7 42/72] x86/sev-es: Allocate and Map IST stack for #VC handler

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Allocate and map an IST stack and an additional fall-back stack for the #VC handler. The memory for the stacks is allocated only when SEV-ES is active. The #VC handler needs to use an IST stack because it could be raised from kernel space with unsafe stack, e.g. in the

[PATCH v7 46/72] x86/sev-es: Add Runtime #VC Exception Handler

2020-09-07 Thread Joerg Roedel
From: Tom Lendacky Add the handlers for #VC exceptions invoked at runtime. Signed-off-by: Tom Lendacky Signed-off-by: Joerg Roedel --- arch/x86/include/asm/idtentry.h | 6 + arch/x86/kernel/idt.c | 11 +- arch/x86/kernel/sev-es.c| 246 +++- 3

[PATCH v7 64/72] x86/vmware: Add VMware specific handling for VMMCALL under SEV-ES

2020-09-07 Thread Joerg Roedel
From: Doug Covelli Add VMware specific handling for #VC faults caused by VMMCALL instructions. Signed-off-by: Doug Covelli Signed-off-by: Tom Lendacky [ jroe...@suse.de: - Adapt to different paravirt interface ] Co-developed-by: Joerg Roedel Signed-off-by: Joerg Roedel ---

[PATCH v7 62/72] x86/paravirt: Allow hypervisor specific VMMCALL handling under SEV-ES

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Add two new paravirt callbacks to provide hypervisor specific processor state in the GHCB and to copy state from the hypervisor back to the processor. Signed-off-by: Joerg Roedel --- arch/x86/include/asm/x86_init.h | 16 +++- arch/x86/kernel/sev-es.c| 12

[PATCH v7 60/72] x86/sev-es: Handle #AC Events

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Implement a handler for #VC exceptions caused by #AC exceptions. The #AC exception is just forwarded to do_alignment_check() and not pushed down to the hypervisor, as requested by the SEV-ES GHCB Standardization Specification. Signed-off-by: Joerg Roedel ---

[PATCH v7 48/72] x86/sev-es: Handle instruction fetches from user-space

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel When a #VC exception is triggered by user-space the instruction decoder needs to read the instruction bytes from user addresses. Enhance vc_decode_insn() to safely fetch kernel and user instructions. Signed-off-by: Joerg Roedel --- arch/x86/kernel/sev-es.c | 31

[PATCH v7 49/72] x86/sev-es: Handle MMIO events

2020-09-07 Thread Joerg Roedel
From: Tom Lendacky Add handler for VC exceptions caused by MMIO intercepts. These intercepts come along as nested page faults on pages with reserved bits set. Signed-off-by: Tom Lendacky [ jroe...@suse.de: Adapt to VC handling framework ] Co-developed-by: Joerg Roedel Signed-off-by: Joerg

[PATCH v7 56/72] x86/sev-es: Handle INVD Events

2020-09-07 Thread Joerg Roedel
From: Tom Lendacky Implement a handler for #VC exceptions caused by INVD instructions. Since Linux should never use INVD, just mark it as unsupported. Signed-off-by: Tom Lendacky [ jroe...@suse.de: Adapt to #VC handling infrastructure ] Co-developed-by: Joerg Roedel Signed-off-by: Joerg

[PATCH v7 50/72] x86/sev-es: Handle MMIO String Instructions

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Add handling for emulation the MOVS instruction on MMIO regions, as done by the memcpy_toio() and memcpy_fromio() functions. Signed-off-by: Joerg Roedel --- arch/x86/kernel/sev-es.c | 77 1 file changed, 77 insertions(+) diff --git

[PATCH v7 58/72] x86/sev-es: Handle MWAIT/MWAITX Events

2020-09-07 Thread Joerg Roedel
From: Tom Lendacky Implement a handler for #VC exceptions caused by MWAIT and MWAITX instructions. Signed-off-by: Tom Lendacky [ jroe...@suse.de: Adapt to #VC handling infrastructure ] Co-developed-by: Joerg Roedel Signed-off-by: Joerg Roedel --- arch/x86/kernel/sev-es.c | 10 ++ 1

[PATCH v7 54/72] x86/sev-es: Handle RDTSC(P) Events

2020-09-07 Thread Joerg Roedel
From: Tom Lendacky Implement a handler for #VC exceptions caused by RDTSC and RDTSCP instructions. Also make it available in the pre-decompression stage because the KASLR code used RDTSC/RDTSCP to gather entropy and some hypervisors intercept these instructions. Signed-off-by: Tom Lendacky [

[PATCH v7 70/72] x86/sev-es: Handle NMI State

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel When running under SEV-ES the kernel has to tell the hypervisor when to open the NMI window again after an NMI was injected. This is done with an NMI-complete message to the hypervisor. Add code to the kernels NMI handler to send this message right at the beginning of

[PATCH v7 65/72] x86/realmode: Add SEV-ES specific trampoline entry point

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel The code at the trampoline entry point is executed in real-mode. In real-mode #VC exceptions can't be handled, so anything that might cause such an exception must be avoided. In the standard trampoline entry code this is the WBINVD instruction and the call to verify_cpu(),

[PATCH v7 47/72] x86/sev-es: Wire up existing #VC exit-code handlers

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Re-use the handlers for CPUID and IOIO caused #VC exceptions in the early boot handler. Signed-off-by: Joerg Roedel --- arch/x86/kernel/sev-es-shared.c | 7 +++ arch/x86/kernel/sev-es.c| 6 ++ 2 files changed, 9 insertions(+), 4 deletions(-) diff --git

[PATCH v7 67/72] x86/smpboot: Load TSS and getcpu GDT entry before loading IDT

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel The IDT on 64bit contains vectors which use paranoid_entry() and/or IST stacks. To make these vectors work the TSS and the getcpu GDT entry need to be set up before the IDT is loaded. Signed-off-by: Joerg Roedel --- arch/x86/include/asm/processor.h | 1 +

[PATCH v7 55/72] x86/sev-es: Handle RDPMC Events

2020-09-07 Thread Joerg Roedel
From: Tom Lendacky Implement a handler for #VC exceptions caused by RDPMC instructions. Signed-off-by: Tom Lendacky [ jroe...@suse.de: Adapt to #VC handling infrastructure ] Co-developed-by: Joerg Roedel Signed-off-by: Joerg Roedel --- arch/x86/kernel/sev-es.c | 22 ++ 1

[PATCH v7 16/72] x86/boot/compressed/64: Always switch to own page-table

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel When booted through startup_64 the kernel keeps running on the EFI page-table until the KASLR code sets up its own page-table. Without KASLR the pre-decompression boot code never switches off the EFI page-table. Change that by unconditionally switching to a kernel controlled

[PATCH v7 03/72] KVM: SVM: Add GHCB Accessor functions

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Building a correct GHCB for the hypervisor requires setting valid bits in the GHCB. Simplify that process by providing accessor functions to set values and to update the valid bitmap and to check the valid bitmap in KVM. Signed-off-by: Joerg Roedel ---

[PATCH v7 25/72] x86/sev-es: Add support for handling IOIO exceptions

2020-09-07 Thread Joerg Roedel
From: Tom Lendacky Add support for decoding and handling #VC exceptions for IOIO events. Signed-off-by: Tom Lendacky [ jroe...@suse.de: Adapted code to #VC handling framework ] Co-developed-by: Joerg Roedel Signed-off-by: Joerg Roedel --- arch/x86/boot/compressed/sev-es.c | 32 +

[PATCH v7 19/72] x86/boot/compressed/64: Add stage1 #VC handler

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Add the first handler for #VC exceptions. At stage 1 there is no GHCB yet becaue the kernel might still be running on the EFI page table. The stage 1 handler is limited to the MSR based protocol to talk to the hypervisor and can only support CPUID exit-codes, but that is

[PATCH v7 20/72] x86/boot/compressed/64: Call set_sev_encryption_mask() earlier

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Call set_sev_encryption_mask() while still on the stage 1 #VC-handler, because the stage 2 handler needs the kernel's own page-tables to be set up, to which calling set_sev_encryption_mask() is a prerequisite. Signed-off-by: Joerg Roedel ---

[PATCH v7 36/72] x86/sev-es: Add SEV-ES Feature Detection

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Add the sev_es_active function for checking whether SEV-ES is enabled. Also cache the value of MSR_AMD64_SEV at boot to speed up the feature checking in the running code. Signed-off-by: Joerg Roedel Reviewed-by: Kees Cook --- arch/x86/include/asm/mem_encrypt.h | 3 +++

[PATCH v7 38/72] x86/sev-es: Compile early handler code into kernel image

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Setup sev-es.c and include the code from the pre-decompression stage to also build it into the image of the running kernel. Temporarily add __maybe_unused annotations to avoid build warnings until the functions get used. Signed-off-by: Joerg Roedel ---

[PATCH v7 35/72] x86/head/64: Move early exception dispatch to C code

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Move the assembly coded dispatch between page-faults and all other exceptions to C code to make it easier to maintain and extend. Also change the return-type of early_make_pgtable() to bool and make it static. Signed-off-by: Joerg Roedel --- arch/x86/include/asm/pgtable.h

[PATCH v7 30/72] x86/head/64: Load GDT after switch to virtual addresses

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Load the GDT right after switching to virtual addresses to make sure there is a defined GDT for exception handling. Signed-off-by: Joerg Roedel Reviewed-by: Kees Cook --- arch/x86/kernel/head_64.S | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff

[PATCH v7 28/72] x86/idt: Split idt_data setup out of set_intr_gate()

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel The code to setup idt_data is needed for early exception handling, but set_intr_gate() can't be used that early because it has pv-ops in its code path, which don't work that early. Split out the idt_data initialization part from set_intr_gate() so that it can be used

[PATCH v7 34/72] x86/idt: Move two function from k/idt.c to i/a/desc.h

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Move these two functions from kernel/idt.c to include/asm/desc.h: * init_idt_data() * idt_init_desc() These functions are needed to setup IDT entries very early and need to be called from head64.c. To be usable this early these functions need to be compiled

[PATCH v7 39/72] x86/sev-es: Setup early #VC handler

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Setup an early handler for #VC exceptions. There is no GHCB mapped yet, so just re-use the vc_no_ghcb_handler. It can only handle CPUID exit-codes, but that should be enough to get the kernel through verify_cpu() and __startup_64() until it runs on virtual addresses.

[PATCH v7 32/72] x86/head/64: Switch to initial stack earlier

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel Make sure there is a stack once the kernel runs from virual addresses. At this stage any secondary CPU which boots will have lost its stack because the kernel switched to a new page-table which does not map the real-mode stack anymore. This is needed for handling early #VC

[PATCH v7 22/72] x86/boot/compressed/64: Add set_page_en/decrypted() helpers

2020-09-07 Thread Joerg Roedel
From: Joerg Roedel The functions are needed to map the GHCB for SEV-ES guests. The GHCB is used for communication with the hypervisor, so its content must not be encrypted. After the GHCB is not needed anymore it must be mapped encrypted again so that the running kernel image can safely re-use