Quoting Emil Velikov (2018-03-02 14:52:28)
> Hi Chris,
>
> On 1 March 2018 at 08:28, Chris Wilson <ch...@chris-wilson.co.uk> wrote:
> > EGL_IMG_context_priority allows the client to request that their
> > rendering be considered high priority. For ourselves,
the GPU is being hogged by background
clients.
Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Daniel Stone <dani...@collabora.com>
Reviewed-by: Daniel Stone <dani...@collabora.com>
---
The previously mentioned bug affecting i965_dri.so not accepting
CONTEXT_ATTRIB_P
Quoting Pekka Paalanen (2017-09-27 15:25:21)
> On Wed, 27 Sep 2017 15:12:15 +0100
> Chris Wilson <ch...@chris-wilson.co.uk> wrote:
>
> > Quoting Alexandros Frantzis (2017-09-27 15:01:08)
> > > On Wed, Sep 27, 2017 at 01:18:47PM +0100, Chris Wilson wrote:
>
Quoting Alexandros Frantzis (2017-09-27 15:01:08)
> On Wed, Sep 27, 2017 at 01:18:47PM +0100, Chris Wilson wrote:
> > Quoting Alexandros Frantzis (2017-09-27 13:09:16)
> > > Use EGL fence sync objects to emit timepoints for the beginning and the
> > > end of rendering o
Quoting Alexandros Frantzis (2017-09-27 13:09:16)
> Use EGL fence sync objects to emit timepoints for the beginning and the
> end of rendering on the GPU.
But why not use a qbo with GL_TIMESTAMP?
sync_file are only timestamped when they are signaled, which is very,
very loosely coupled with the
and then Weston uses the buffer as scanout buffer, when
the buffer is
released and we render again in the buffer, L3 caching is disabled.
It is simple to demonstrate that hypothesis incorrect by marking all
colour buffers as uncached.
-Chirs
--
Chris Wilson, Intel Open Source Technology Centre
allocating a new cached backbuffer each frame?
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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that behind the callers back!
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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. Unfortunately one side-effect of cairo flushing everything
prior to the swap caused the current context to be set to invalid.
Author: Chris Wilson ch...@chris-wilson.co.uk
Date: Mon Dec 12 13:52:27 2011 +
gl: Set the destination for swap buffers, required by EGL at least
EGL
us a thing or
two about the DRM infrastructure and what it might look like in a year
or two as more SoC gradually become mainline?
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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