> On Jul 5, 2017, at 19:19, Caio Lima wrote:
>
> 2017-07-05 12:41 GMT-03:00 JF Bastien :
>> On Linux you can do the following:
>>
>> ((void(*)())0x0fa0)();
>>
>>
>> That address contains a helper which does the “right” barrier, including if
>>
2017-07-05 12:41 GMT-03:00 JF Bastien :
> On Linux you can do the following:
>
> ((void(*)())0x0fa0)();
>
>
> That address contains a helper which does the “right” barrier, including if
> you’re not on an SMP system it’ll do nothing.
>
> Details:
>
Alternatively, the JIT can read the content of these addresses and write them
back as-is
> On Jul 5, 2017, at 09:01, Filip Pizlo wrote:
>
> We should not use those helpers, especially in the JIT. It does not make
> sense for the JIT to emit calls to system functions when
We should not use those helpers, especially in the JIT. It does not make sense
for the JIT to emit calls to system functions when the user is expecting it to
emit an instruction. If we cannot perfectly select the right barrier on a
particular CPU, we should disable concurrency on that CPU.
On Linux you can do the following:
((void(*)())0x0fa0)();
That address contains a helper which does the “right” barrier, including if
you’re not on an SMP system it’ll do nothing.
Details: https://www.kernel.org/doc/Documentation/arm/kernel_user_helpers.txt
Hi all.
I'm working in this patch
(https://bugs.webkit.org/show_bug.cgi?id=172767) and Mark Lam raised
some questions about the data memory barrier (DMB for short) in ARMv6
using "mcr 15 ...". The point is that we are having divergences in ARM
official reference manual about the semantics of this
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