# HG changeset patch
# User Deepthi Nandakumar deep...@multicorewareinc.com
# Date 1385626939 -19800
# Node ID ca8c57f0c53248a36db6d04639c39ac0e2829fcd
# Parent 54379de63b85187b094e7cd763b0a03fce0ddea0
RD merge: remove earlyDetectionSkip, output is unchanged.
diff -r 54379de63b85 -r ca8c57f0c532
# HG changeset patch
# User Dnyaneshwar G dnyanesh...@multicorewareinc.com
# Date 1385624240 -19800
# Thu Nov 28 13:07:20 2013 +0530
# Node ID 3e94e05251fbf3e55f5195736bb95f0ac6de6ad6
# Parent 949f85337789c8d00f39ed1a010990efe67ebcf4
asm: assembly code for intra_pred_planar[32x32]
diff -r
# HG changeset patch
# User Murugan Vairavel muru...@multicorewareinc.com
# Date 1385630919 -19800
# Thu Nov 28 14:58:39 2013 +0530
# Node ID 7a0fe2f9074330bb3126e95194e7c4ed956c6e4d
# Parent a0fbadcf1f913211e0d0915778e6c8bf462da754
asm: code for pixel_sse_sp_12x16
diff -r a0fbadcf1f91 -r
Reverting the sa8d_inter changes. This block always uses square CUs, so
sa8d primitives are sufficient.
# HG changeset patch
# User Deepthi Nandakumar deep...@multicorewareinc.com
# Date 1385631244 -19800
# Node ID 2ba6c26c9febdc8c57d3014c0cf98d4897d3992d
# Parent
# HG changeset patch
# User Murugan Vairavel muru...@multicorewareinc.com
# Date 1385632076 -19800
# Thu Nov 28 15:17:56 2013 +0530
# Node ID f0d2ef33a0bdb41b9b3d7edb9e0b7358b0783271
# Parent 7a0fe2f9074330bb3126e95194e7c4ed956c6e4d
asm: cleanups for pixel_sse_sp
diff -r 7a0fe2f90743 -r
# HG changeset patch
# User Deepthi Nandakumar deep...@multicorewareinc.com
# Date 1385632492 -19800
# Node ID 42892f4f4cc209a224a646f439a4bb4eba4389b3
# Parent 2ba6c26c9febdc8c57d3014c0cf98d4897d3992d
RD merge: refine merge costs with estimated merge mode bits.
diff -r 2ba6c26c9feb -r
# HG changeset patch
# User Sumalatha Polureddy
# Date 1385639857 -19800
# Node ID bebef81f10563d404ddb03ce0d7f53dae2013664
# Parent 2ba6c26c9febdc8c57d3014c0cf98d4897d3992d
no-rdo: made TOPSKIP Macro as CLI option
--topskip will enable topskip
--no-topskip will disable topskip
diff -r
# HG changeset patch
# User Yuvaraj Venkatesh yuva...@multicorewareinc.com
# Date 1385640311 -19800
# Thu Nov 28 17:35:11 2013 +0530
# Node ID 12466d9e0b8fb5b0ca048d9939d23046848dc23a
# Parent 2ba6c26c9febdc8c57d3014c0cf98d4897d3992d
asm: added missing sa8d blocks sizes to asm-primitives
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# HG changeset patch
# User Nabajit Deka
# Date 1385641262 -19800
# Thu Nov 28 17:51:02 2013 +0530
# Node ID cb54626347bc69690c2a6ee2983e57b76314e3e2
# Parent 2ba6c26c9febdc8c57d3014c0cf98d4897d3992d
asm : Adding asm routine for dst4.
diff -r 2ba6c26c9feb -r cb54626347bc
# HG changeset patch
# User Nabajit Deka
# Date 1385641369 -19800
# Thu Nov 28 17:52:49 2013 +0530
# Node ID cb674b5caed0fc4c07f16d74ea7d7cb0af946524
# Parent cb54626347bc69690c2a6ee2983e57b76314e3e2
Enable dst4 asm
diff -r cb54626347bc -r cb674b5caed0 source/common/vec/dct-ssse3.cpp
---
Ignore this patch. I will send another.
On Thu, Nov 28, 2013 at 5:38 PM, chen chenm...@163.com wrote:
+;-
+; int pixel_ssd_sp_4x4( int16_t *, intptr_t, uint8_t *, intptr_t )
# HG changeset patch
# User Murugan Vairavel muru...@multicorewareinc.com
# Date 1385644665 -19800
# Thu Nov 28 18:47:45 2013 +0530
# Node ID d085a3b535c8587bb9ce8a0adcc26fe47b166394
# Parent 949f85337789c8d00f39ed1a010990efe67ebcf4
asm: code for pixel_sse_sp_4xN
diff -r 949f85337789 -r
# HG changeset patch
# User Dnyaneshwar G dnyanesh...@multicorewareinc.com
# Date 1385644066 -19800
# Thu Nov 28 18:37:46 2013 +0530
# Node ID c11165c61c98ad7d5353be480ba6a5f9e3d0df46
# Parent 04cf7a0fbdae38b011447c2b63c4911d0d10b6ba
asm: assembly code for cvt16to32_shl
diff -r 04cf7a0fbdae
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