Re: [x265] [PATCH 2 of 3] rc: accumulate mv bits, coeff bits per frame

Thanks, can you merge with the latest tip? On Fri, Jun 27, 2014 at 12:13 AM, Aarthi Priya Thirumalai aar...@multicorewareinc.com wrote: # HG changeset patch # User Aarthi Thirumalaiaar...@multicorewareinc.com # Date 1403808050 -19800 # Fri Jun 27 00:10:50 2014 +0530 # Node ID

[x265] [PATCH] psyrd: fix for inconsistent output

# HG changeset patch # User Sumalatha Polureddysumala...@multicorewareinc.com # Date 1403858781 -19800 # Node ID a789870889fcc9a31deff7fc6961d143b0db86c1 # Parent 1b669c33ff3a8d8f6c9bd1e18979c009baed2433 psyrd: fix for inconsistent output maximum buffer size for zeropel is

[x265] fix emms: move selectLambda() into xRateDistOptQuant() and issue emms before it

# HG changeset patch # User Satoshi Nakagawa nakagawa...@oki.com # Date 1403877807 -32400 # Fri Jun 27 23:03:27 2014 +0900 # Node ID 77f443fe169ca23969df5d5ee6968543bfa5e794 # Parent 32aa6cc3cf4d108ac92f5d29258b2c38ca888d29 fix emms: move selectLambda() into xRateDistOptQuant() and issue

Re: [x265] [PATCH 1 of 2] improve count_nonzero by SSSE3

On 6/27/2014 4:05 PM, chen wrote: I can't understand what's your means. could you tell me more? I use some SSSE3 instruction and process 16 pixels every loop. I meant keep both sse2 and ssse3 variants. Not sure if x86inc.asm macros help with this or not. - Derek

Re: [x265] [PATCH 1 of 2] improve count_nonzero by SSSE3

On 6/27/2014 6:08 PM, chen wrote: I use ssse3 instruction PSHUFB to replace 3 SSE2 instructions, the x86inc macro can't handle it. After patch, this function is faster ~20% and codeCoeffNxN ~7% speedup, so I don't worry about old CPU's performance. I guess SSSE3 is very prevalent nowadays