# HG changeset patch # User Vignesh Vijayakumar<vign...@multicorewareinc.com> # Date 1511413717 -19800 # Thu Nov 23 10:38:37 2017 +0530 # Node ID 4714e877aaec710502f81f383734247ef8c4aea4 # Parent 0a02902ce080dc603d4db29ebaedc0206bfb207c x86: AVX512 interp_8tap_vert_sp_32xN for high bit depth
Size | AVX2 performance | AVX512 performance ---------------------------------------------- 32x8 | 11.19x | 21.49x 32x16 | 12.71x | 21.83x 32x24 | 11.99x | 22.19x 32x32 | 12.52x | 22.48x 32x64 | 12.62x | 22.16x diff -r 0a02902ce080 -r 4714e877aaec source/common/x86/asm-primitives.cpp --- a/source/common/x86/asm-primitives.cpp Thu Nov 23 11:59:06 2017 +0530 +++ b/source/common/x86/asm-primitives.cpp Thu Nov 23 10:38:37 2017 +0530 @@ -2841,6 +2841,12 @@ p.pu[LUMA_32x24].luma_vss = PFX(interp_8tap_vert_ss_32x24_avx512); p.pu[LUMA_32x64].luma_vss = PFX(interp_8tap_vert_ss_32x64_avx512); + p.pu[LUMA_32x8].luma_vsp = PFX(interp_8tap_vert_sp_32x8_avx512); + p.pu[LUMA_32x16].luma_vsp = PFX(interp_8tap_vert_sp_32x16_avx512); + p.pu[LUMA_32x32].luma_vsp = PFX(interp_8tap_vert_sp_32x32_avx512); + p.pu[LUMA_32x24].luma_vsp = PFX(interp_8tap_vert_sp_32x24_avx512); + p.pu[LUMA_32x64].luma_vsp = PFX(interp_8tap_vert_sp_32x64_avx512); + p.cu[BLOCK_8x8].dct = PFX(dct8_avx512); p.cu[BLOCK_8x8].idct = PFX(idct8_avx512); p.cu[BLOCK_16x16].idct = PFX(idct16_avx512); diff -r 0a02902ce080 -r 4714e877aaec source/common/x86/ipfilter16.asm --- a/source/common/x86/ipfilter16.asm Thu Nov 23 11:59:06 2017 +0530 +++ b/source/common/x86/ipfilter16.asm Thu Nov 23 10:38:37 2017 +0530 @@ -10795,7 +10795,7 @@ ;------------------------------------------------------------------------------------------------------------- ;avx512 luma_vss and luma_vsp code start ;------------------------------------------------------------------------------------------------------------- -%macro PROCESS_LUMA_VERT_SS_32x2_AVX512 0 +%macro PROCESS_LUMA_VERT_S_32x2_AVX512 1 movu m1, [r0] ;0 row movu m3, [r0 + r1] ;1 row punpcklwd m0, m1, m3 @@ -10863,6 +10863,21 @@ paddd m2, m10 paddd m3, m11 +%ifidn %1, sp + paddd m0, m19 + paddd m1, m19 + paddd m2, m19 + paddd m3, m19 + + psrad m0, INTERP_SHIFT_SP + psrad m1, INTERP_SHIFT_SP + psrad m2, INTERP_SHIFT_SP + psrad m3, INTERP_SHIFT_SP + + packssdw m0, m1 + packssdw m2, m3 + CLIPW2 m0, m2, m20, m21 +%else psrad m0, 6 psrad m1, 6 psrad m2, 6 @@ -10870,6 +10885,7 @@ packssdw m0, m1 packssdw m2, m3 +%endif movu [r2], m0 movu [r2 + r3], m2 @@ -10877,9 +10893,9 @@ ;----------------------------------------------------------------------------------------------------------------- ; void interp_4tap_vert(int16_t *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx) ;----------------------------------------------------------------------------------------------------------------- -%macro FILTER_VER_SS_LUMA_32xN_AVX512 1 +%macro FILTER_VER_S_LUMA_32xN_AVX512 2 INIT_ZMM avx512 -cglobal interp_8tap_vert_ss_32x%1, 5, 8, 19 +cglobal interp_8tap_vert_%1_32x%2, 5, 8, 22 add r1d, r1d add r3d, r3d lea r7, [3 * r1] @@ -10898,22 +10914,32 @@ mova m17, [r5 + 2 * mmsize] mova m18, [r5 + 3 * mmsize] %endif - -%rep %1/2 - 1 - PROCESS_LUMA_VERT_SS_32x2_AVX512 +%ifidn %1, sp + vbroadcasti32x4 m19, [INTERP_OFFSET_SP] + pxor m20, m20 + vbroadcasti32x8 m21, [pw_pixel_max] +%endif + +%rep %2/2 - 1 + PROCESS_LUMA_VERT_S_32x2_AVX512 %1 lea r0, [r0 + 2 * r1] lea r2, [r2 + 2 * r3] %endrep - PROCESS_LUMA_VERT_SS_32x2_AVX512 + PROCESS_LUMA_VERT_S_32x2_AVX512 %1 RET %endmacro %if ARCH_X86_64 - FILTER_VER_SS_LUMA_32xN_AVX512 8 - FILTER_VER_SS_LUMA_32xN_AVX512 16 - FILTER_VER_SS_LUMA_32xN_AVX512 32 - FILTER_VER_SS_LUMA_32xN_AVX512 24 - FILTER_VER_SS_LUMA_32xN_AVX512 64 + FILTER_VER_S_LUMA_32xN_AVX512 ss, 8 + FILTER_VER_S_LUMA_32xN_AVX512 ss, 16 + FILTER_VER_S_LUMA_32xN_AVX512 ss, 32 + FILTER_VER_S_LUMA_32xN_AVX512 ss, 24 + FILTER_VER_S_LUMA_32xN_AVX512 ss, 64 + FILTER_VER_S_LUMA_32xN_AVX512 sp, 8 + FILTER_VER_S_LUMA_32xN_AVX512 sp, 16 + FILTER_VER_S_LUMA_32xN_AVX512 sp, 32 + FILTER_VER_S_LUMA_32xN_AVX512 sp, 24 + FILTER_VER_S_LUMA_32xN_AVX512 sp, 64 %endif ;------------------------------------------------------------------------------------------------------------- ;avx512 luma_vss and luma_vsp code end _______________________________________________ x265-devel mailing list x265-devel@videolan.org https://mailman.videolan.org/listinfo/x265-devel