On Wed, Feb 08, 2017 at 02:07:26PM +0800, Haozhong Zhang wrote:
> On 01/27/17 17:11 -0500, Konrad Rzeszutek Wilk wrote:
> > On Mon, Oct 10, 2016 at 08:32:34AM +0800, Haozhong Zhang wrote:
> > > If any error code is returned when creating a domain, stop the domain
> > > creation.
> >
> > This looks
At 17:26 + on 30 Jan (1485797162), Andrew Cooper wrote:
> The vTLB and last_write* booleans are used exclusively by the shadow pagetable
> code. Move them from paging_vcpu to shadow_vcpu, which causes them to be
> entirely omitted on a build without shadow paging support.
>
> While changing t
On February 08, 2017 4:52 PM, Jan Beulich wrote:
On 08.02.17 at 09:27, wrote:
>> Assumed vCPU is in guest_mode..
>> When apicv is enabled, hypervisor calls vmx_deliver_posted_intr(),
>> then
>> __vmx_deliver_posted_interrupt() to deliver interrupt, but no vmexit
>> (also no
>> vcpu_kick() )..
At 17:26 + on 30 Jan (1485797161), Andrew Cooper wrote:
> No functional change yet, but required for subsequent changes.
>
> Signed-off-by: Andrew Cooper
Acked-by: Tim Deegan
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On 08/02/17 09:27, Vijay Kilari wrote:
Hi Daniel,
Hello,
After git bisect, I found that following commit is causing
regression for ARM.
Though efi_flags is set with EFI_BOOT, In xen, efi_enabled() returns 0 and
thereby boot fails with ACPI.
Is it that runtime services are not implemented
There is an issue with the original __vmread() in nested vmx mode:
emulation of a guest's VMREAD with invalid arguments leads to BUG().
Fix this by using vmread_safe() and reporting any kind of VMfail back
to the guest.
A new safe versions of get_vvmcs() macro and related functions are
introduced
The original function doesn't distinguish between Valid and Invalid
VMfails. Improved function returns error code depending on the outcome:
VMsucceed: 0
VMfailValid: VM Instruction Error Number
VMfailInvalid: VMX_INSN_FAIL_INVALID (~0)
Existing users of __vmread_safe() are upda
Currently, emulation of vmread and vmwrite for a guest leads to BUG()
in cases when actual VMREAD or VMWRITE ends up in VMfail due to invalid
arguments. The goal of this patch series is to prevent the BUG() from
happening and report any kind of VMfail back to the guest, just like
it would be done
Any fail during the original __vmwrite() leads to BUG() which can be
easily exploited from a guest in the nested vmx mode.
The new function returns error code depending on the outcome:
VMsucceed: 0
VMfailValid: VM Instruction Error Number
VMfailInvalid: a new VMX_INSN_FAIL
There is an issue with the original __vmwrite() in nested vmx mode:
emulation of a guest's VMWRITE with invalid arguments leads to BUG().
Fix this by using vmwrite_safe() and reporting any kind of VMfail back
to the guest.
A new safe versions of set_vvmcs() macro and related functions are
introdu
At 03:44 -0700 on 31 Jan (1485834259), Jan Beulich wrote:
> >>> On 30.01.17 at 16:17, wrote:
> > Commit 71bb7304e7a7a35ea6df4b0cedebc35028e4c159 added flushing of
> > nested p2m tables whenever the host p2m table changed. Unfortunately
> > in the process, it added a filter to the generic p2m_flus
At 18:48 + on 07 Feb (1486493293), Andrew Cooper wrote:
> Until the IPI has completed, other processors might be running on this nested
> p2m object. clear_domain_page() does not guarantee to make 8-byte atomic
> updates, which means that a pagewalk on a remote processor might encounter a
> pa
On Thu, Feb 02, 2017 at 12:47:17PM +, Wei Liu wrote:
> On Thu, Feb 02, 2017 at 01:20:49PM +0100, Fatih Acar wrote:
> > This permits to have control over the devid attribute when attaching new
> > nics.
> > It may become useful if one has its own nic indexing somewhere else than
> > xl/xenstor
On Tue, Feb 07, 2017 at 11:03:57AM +, Andrew Cooper wrote:
> On 07/02/17 11:02, Wei Liu wrote:
> > The "reg" variable in fuzz_read_msr stores the real MSR index, not an
> > index within the fuzzer.
> >
> > The rest of that function already handles things correctly. We just need
> > to remove th
Hi Daniel,
After git bisect, I found that following commit is causing
regression for ARM.
Though efi_flags is set with EFI_BOOT, In xen, efi_enabled() returns 0 and
thereby boot fails with ACPI.
Is it that runtime services are not implemented for ARM,
efi_flags are returning zero?.
commit 146
It is currently possible for the guest to lock when subscribing
to synchronous vm_events if max_vcpus is larger than the
number of available ring buffer slots. This patch no longer
blocks already paused VCPUs, fixing the issue for this use
case.
Signed-off-by: Razvan Cojocaru
---
xen/common/vm_e
On 01/28/2017 01:05 AM, Wei Liu wrote:
On Thu, Jan 26, 2017 at 02:36:07PM +0800, Zhang Chen wrote:
Qemu need this args to start userspace colo-proxy.
Signed-off-by: Zhang Chen
Since we have:
# Note that the COLO configuration settings should be considered unstable.
# They may change
On 01/28/2017 01:05 AM, Wei Liu wrote:
On Thu, Jan 26, 2017 at 02:36:08PM +0800, Zhang Chen wrote:
Qemu need this args to start userspace colo-proxy.
Signed-off-by: Zhang Chen
See previous patch. Same comments apply here.
OK~ I will fix it in next version.
Thanks
Zhang Chen
Wei.
.
On 01/28/2017 01:08 AM, Wei Liu wrote:
On Thu, Jan 26, 2017 at 02:36:03PM +0800, Zhang Chen wrote:
Hi~ All~ Happy Chinese New Year~~
Happy Chinese New Year to you, too!
I skimmed through this series and made some comments based on my
preliminary assessment. If you have any questions, feel fr
On 01/28/2017 01:05 AM, Wei Liu wrote:
On Thu, Jan 26, 2017 at 02:36:09PM +0800, Zhang Chen wrote:
We use old kernel colo proxy way to get the checkpoint event from qemu.
This patch have some TODO job.
Qemu compare need add a API to support this(I will add this in qemu).
Signed-off-by: Zhang
>>> On 08.02.17 at 09:27, wrote:
> Assumed vCPU is in guest_mode..
> When apicv is enabled, hypervisor calls vmx_deliver_posted_intr(), then
> __vmx_deliver_posted_interrupt() to deliver interrupt, but no vmexit (also no
> vcpu_kick() )..
> In __vmx_deliver_posted_interrupt(), it is __conditiona
From: Oleksandr Andrushchenko
Hi, all!
Please find the next version of the ABI for the PV sound
after addressing review comments.
Thank you,
Oleksandr Andrushchenko
Oleksandr Grytsov
Oleksandr Andrushchenko (1):
xen/sndif: Add sound-device ABI
xen/include/public/io/sndif.h | 749 ++
From: Oleksandr Andrushchenko
Add ABI for the two halves of a para-virtualized
sound driver to communicate with each other.
The ABI allows implementing audio playback and capture as
well as volume control and possibility to mute/unmute
audio sources.
Note: depending on the use-case backend can
From: Oleksandr Andrushchenko
Add ABI for the two halves of a para-virtualized
sound driver to communicate with each other.
The ABI allows implementing audio playback and capture as
well as volume control and possibility to mute/unmute
audio sources.
Note: depending on the use-case backend can
From: Oleksandr Andrushchenko
Hi, all!
Please find the next version of the ABI for the PV sound
after addressing review comments.
Thank you,
Oleksandr Andrushchenko
Oleksandr Grytsov
Oleksandr Andrushchenko (1):
xen/sndif: Add sound-device ABI
xen/include/public/io/sndif.h | 749 ++
On Wed, Feb 08, 2017 at 04:06:53PM +0800, Tian, Kevin wrote:
>> From: Gao, Chao
>> Sent: Wednesday, February 08, 2017 8:12 AM
>>
>> On Tue, Feb 07, 2017 at 09:18:56AM -0700, Jan Beulich wrote:
>> On 07.02.17 at 08:28, wrote:
>> >> On Tue, Feb 07, 2017 at 06:46:16AM -0700, Jan Beulich wrote:
On Tue, Feb 07, 2017 at 05:24:03PM -0700, Tamas K Lengyel wrote:
> On Tue, Feb 7, 2017 at 1:51 PM, Julien Grall wrote:
>
> > Hi Tamas,
> >
> > On 07/02/2017 20:38, Tamas K Lengyel wrote:
> >
> >>
> >>
> >> On Tue, Feb 7, 2017 at 12:42 PM, Edgar E. Iglesias
> >> mailto:edgar.igles...@gmail.com>> w
On February 08, 2017 2:51 PM, Tian, Kevin wrote:
>> From: Xuquan (Quan Xu) [mailto:xuqu...@huawei.com]
>> Sent: Monday, January 23, 2017 6:57 PM
>>
>> On January 20, 2017 5:09 PM, Quan Xu wrote:
>> >btw, for PIR.. I find that there might be a bug in
>> >__vmx_deliver_posted_interrupt()...
>> >why t
This patch implements the xl/xc changes to support set CBM
for L2 CAT.
The new level option is introduced to original CAT setting
command in order to set CBM for specified level CAT.
- 'xl psr-cat-cbm-set' is updated to set cache capacity
bitmasks(CBM) for a domain according to input cache level
This patch implements changes in xl/xc changes to support
showing CBM of L2 CAT.
The new level option is introduced to original CAT showing
command in order to show CBM for specified level CAT.
- 'xl psr-cat-show' is updated to show CBM of a domain
according to input cache level.
Examples:
root
This patch adds L2 CAT description in related documents.
Signed-off-by: He Chen
Signed-off-by: Yi Sun
Acked-by: Wei Liu
---
docs/man/xl.pod.1.in | 25 ++---
docs/misc/xl-psr.markdown | 10 --
2 files changed, 30 insertions(+), 5 deletions(-)
diff --git a/docs/
This patch implements xl/xc changes to support get HW info
for L2 CAT.
'xl psr-hwinfo' is updated to show both L3 CAT and L2 CAT
info.
Example(on machine which only supports L2 CAT):
Cache Monitoring Technology (CMT):
Enabled : 0
Cache Allocation Technology (CAT): L2
Socket ID : 0
M
This patch implements get HW info flow for L2 CAT including L2 CAT callback
function.
Signed-off-by: Yi Sun
---
xen/arch/x86/psr.c | 16
xen/arch/x86/sysctl.c | 15 +++
xen/include/asm-x86/psr.h | 1 +
xen/include/public/sysctl.h | 6 ++
4 file
This patch implements L2 CAT get value callback function and
interface in domctl.
Signed-off-by: Yi Sun
---
xen/arch/x86/domctl.c | 7 +++
xen/arch/x86/psr.c | 12
xen/include/public/domctl.h | 1 +
3 files changed, 20 insertions(+)
diff --git a/xen/arch/x86/do
This patch implements the CPU init and free flow for L2 CAT including
L2 CAT initialization callback function.
Signed-off-by: Yi Sun
---
v6:
- use 'struct cpuid_leaf' in x86_emulate.h.
- use cpuid_count_leaf() to get cpuid info.
- adjust macro value position.
---
xen/arch/x86/psr.c
This patch implements L2 CAT set value related callback functions
and domctl interface.
Signed-off-by: Yi Sun
---
xen/arch/x86/domctl.c | 6 +++
xen/arch/x86/psr.c | 92 +
xen/include/asm-x86/msr-index.h | 1 +
xen/include/public/d
Continue with previous patch:
'x86: refactor psr: set value: implement cos finding flow.'
If fail to find a COS ID, we need pick a new COS ID for domain. Only COS ID
that ref[COS_ID] is 1 or 0 can be picked to input a new set feature values.
Signed-off-by: Yi Sun
---
xen/arch/x86/psr.c | 99 +++
As set value flow is the most complicated one in psr, it will be
divided to some patches to make things clearer. This patch
implements the set value framework to show a whole picture firstly.
It also changes domctl interface to make it more general.
To make the set value flow be general and can s
This patch implements the Domain init/free and schedule flows.
Signed-off-by: Yi Sun
---
v6:
- change 'PSR_ASSOC_REG_POS' to 'PSR_ASSOC_REG_SHIFT'.
---
xen/arch/x86/psr.c | 62 +-
1 file changed, 61 insertions(+), 1 deletion(-)
diff --git
This patch implements the CPU init and free flow for CDP including L3 CDP
initialization callback function.
Signed-off-by: Yi Sun
---
v6:
- use 'struct cpuid_leaf' in x86_emulate.h.
- use cpuid_count_leaf() to get cpuid info.
---
xen/arch/x86/psr.c | 104 +
This patch implements L3 CDP get value callback function.
With this patch, 'psr-cat-show' can work for L3 CDP.
Signed-off-by: Yi Sun
---
xen/arch/x86/psr.c | 16
1 file changed, 16 insertions(+)
diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
index 5c307b5..df83aa1 100644
This patch implements get HW info flow including L3 CAT callback
function.
It also changes sysctl interface to make it more general.
With this patch, 'psr-hwinfo' can work for L3 CAT.
Signed-off-by: Yi Sun
---
v6:
- adjust '{' position for switch.
- define 'PSR_SOCKET_UNKNOWN = 0x'
Hi all,
We plan to bring a new PSR (Platform Shared Resource) feature called
Intel L2 Cache Allocation Technology (L2 CAT) to Xen.
Besides the L2 CAT implementaion, we refactor the psr.c to make it more
flexible to add new features and fulfill the principle, open for extension
but closed for modi
To construct an extendible framework, we need analyze PSR features
and abstract the common things and feature specific things. Then,
encapsulate them into different data structures.
By analyzing PSR features, we can get below map.
+--+--+--+
->| Dom0 | Dom
Continue with previous patch:
'x86: refactor psr: set value: implement cos id picking flow.'
We have got all features values and COS ID to set. Then, we write MSRs of all
features except the setting value is same as original value.
Till now, set value process is completed.
Signed-off-by: Yi Sun
Continue with patch:
'x86: refactor psr: set value: assemble features value array'
We can try to find if there is a COS ID on which all features' COS registers
values are same as the array assembled before.
Signed-off-by: Yi Sun
---
xen/arch/x86/psr.c | 93 ++
This patch implements the CPU init and free flow including L3 CAT
initialization and feature list free.
Signed-off-by: Yi Sun
---
v6:
- use 'struct cpuid_leaf' in x86_emulate.h.
- move cpuid_{,count}_leaf() helpers from cpuid.c to processor.h for
external user and pass the compilati
This patch implements L3 CDP set value related callback functions.
With this patch, 'psr-cat-cbm-set' command can work for L3 CDP.
Signed-off-by: Yi Sun
---
xen/arch/x86/psr.c | 118 +
1 file changed, 118 insertions(+)
diff --git a/xen/arch/x
This patch implements get HW info flow for CDP including L3 CDP callback
function.
It also changes sysctl function to make it work for CDP.
With this patch, 'psr-hwinfo' can work for L3 CDP.
Signed-off-by: Yi Sun
---
xen/arch/x86/psr.c| 18 ++
xen/arch/x86/sysctl.c | 24 +++
Only can one COS ID be used by one domain at one time. That means all enabled
features' COS registers at this COS ID are valid for this domain at that time.
When user updates a feature's value, we need make sure all other features'
values are not affected. So, we firstly need assemble an array whi
This patch creates CAT and CDP feature document in doc/features/. It describes
key points to implement L3 CAT/CDP and L2 CAT which is described in details in
Intel SDM "INTEL® RESOURCE DIRECTOR TECHNOLOGY (INTEL® RDT) ALLOCATION
FEATURES".
Signed-off-by: Yi Sun
---
v6:
- write a new feature
The current cache allocation codes in psr.c do not consider
future features addition and are not friendly to extend.
To make psr.c be more flexible to add new features and fulfill
the program principle, open for extension but closed for
modification, we have to refactor the psr.c:
1. Analyze cache
This patch implements get value flow including L3 CAT callback
function.
It also changes domctl interface to make it more general.
With this patch, 'psr-cat-show' can work for L3 CAT but not for
L3 code/data which is implemented in patch "x86: refactor psr:
implement get value flow for CDP.".
Si
flight 105624 libvirt real [real]
http://logs.test-lab.xenproject.org/osstest/logs/105624/
Failures :-/ but no regressions.
Regressions which are regarded as allowable (not blocking):
test-armhf-armhf-libvirt-xsm 13 saverestore-support-checkfail like 105434
test-armhf-armhf-libvirt 13
> From: Gao, Chao
> Sent: Wednesday, February 08, 2017 8:12 AM
>
> On Tue, Feb 07, 2017 at 09:18:56AM -0700, Jan Beulich wrote:
> On 07.02.17 at 08:28, wrote:
> >> On Tue, Feb 07, 2017 at 06:46:16AM -0700, Jan Beulich wrote:
> >> On 07.02.17 at 07:32, wrote:
> On Tue, Feb 07, 2017
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