Re: [Xen-devel] [PATCH v2] AMD-Vi: allocate root table on demand

eul...@suse.com> --- v2: Add AMD_IOMMU_DEBUG() + domain_crash() to amd_iommu_map_page() error path for consistency with other code in this function. Acked-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Thanks, Suravee ___ Xen-devel mail

Re: [Xen-devel] [PATCH] AMD-Vi: allocate root table on demand

Hi Jan, Sorry for delay. Please seem my comment below. On 3/3/17 21:29, Jan Beulich wrote: This was my originally intended fix for the AMD side of XSA-207: There's no need to unconditionally allocate the root table, and with that there's then also no way to leak it when a guest has no devices

[Xen-devel] [PATCH V6] x86/HVM: Introduce struct hvm_pi_ops

The current function pointers in struct vmx_domain for managing hvm posted interrupt can be used also by SVM AVIC. Therefore, this patch introduces struct hvm_pi_ops, which is declared in struct hvm_domain. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Cc: Jan B

Re: [Xen-devel] [PATCH V5] x86/HVM: Introduce struct hvm_pi_ops

Also, I just noticed another suggestion from Boris to change the hvm_domain.pi_ops to a pointer instead. So, I will be sending out V6. Thanks, Suravee On 1/17/17 09:35, Suravee Suthikulpanit wrote: The current function pointers in struct vmx_domain for managing hvm posted interrupt can be used

[Xen-devel] [PATCH V5] x86/HVM: Introduce struct hvm_pi_ops

The current function pointers in struct vmx_domain for managing hvm posted interrupt can be used also by SVM AVIC. Therefore, this patch introduces the struct hvm_pi_ops in the struct hvm_domain to hold them. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Cc: Jan B

Re: [Xen-devel] [PATCH V4] x86/HVM: Introduce struct hvm_pi_ops

GRR... sorry again for confusion. Sending error. Please ignore version4. I'll send out V5 instead then. Suravee ___ Xen-devel mailing list Xen-devel@lists.xen.org https://lists.xen.org/xen-devel

Re: [Xen-devel] [PATCH V4] x86/HVM: Introduce struct hvm_pi_ops (RESEND)

From 2b8e159039e3e70414d49932e558b0d26b44be11 Mon Sep 17 00:00:00 2001 From: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Date: Sat, 17 Sep 2016 01:19:49 -0500 Subject: [PATCH V4] x86/HVM: Introduce struct hvm_pi_ops The current function pointers in struct vmx_domain for managi

[Xen-devel] [PATCH V4] x86/HVM: Introduce struct hvm_pi_ops

The current function pointers in struct vmx_domain for managing hvm posted interrupt can be used also by SVM AVIC. Therefore, this patch introduces the struct hvm_pi_ops in the struct hvm_domain to hold them. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Cc: Andrew

Re: [Xen-devel] [PATCH V3] x86/HVM: Introduce struct hvm_pi_ops

Kevin, On 1/16/17 09:13, Tian, Kevin wrote: diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 7b2c50c..0854e17 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -103,6 +103,47 @@ void vmx_pi_per_cpu_init(unsigned int cpu)

Re: [Xen-devel] [PATCH V3] x86/HVM: Introduce struct hvm_pi_ops

Jan, I would like to updated the following to be more correct. On 1/12/17 19:37, Jan Beulich wrote: On 12.01.17 at 05:47, wrote: --- a/xen/include/asm-x86/hvm/domain.h +++ b/xen/include/asm-x86/hvm/domain.h @@ -72,6 +72,38 @@ struct hvm_ioreq_server {

[Xen-devel] [PATCH V3] x86/HVM: Introduce struct hvm_pi_ops

The current function pointers in struct vmx_domain for managing hvm posted interrupt can be used also by SVM AVIC. Therefore, this patch introduces the struct hvm_pi_ops in the struct hvm_domain to hold them. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Cc: Andrew

Re: [Xen-devel] [PATCH v3] x86/HVM: Fix teardown ordering in hvm_vcpu_destroy()

On 1/10/17 21:26, Andrew Cooper wrote: On 10/01/17 14:15, Andrew Cooper wrote: On 10/01/17 14:03, Suravee Suthikulpanit wrote: The order of destroy function calls in hvm_vcpu_destroy() should be the reverse of init calls in hvm_vcpu_initialise(). Signed-off-by: Suravee Suthikulpanit

[Xen-devel] [PATCH v3] x86/HVM: Fix teardown ordering in hvm_vcpu_destroy()

The order of destroy function calls in hvm_vcpu_destroy() should be the reverse of init calls in hvm_vcpu_initialise(). Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Reviewed-by: Konrad Rzeszutek Wilk <konrad.w...@oracle.com> Reviewed-by: Kevin Tian <kevin

Re: [Xen-devel] [PATCH v2 10/10] x86/SVM: Add AMD AVIC key handler

Jan, On 01/05/2017 11:07 PM, Jan Beulich wrote: On 31.12.16 at 06:46, wrote: +void __init setup_avic_dump(void) +{ +register_keyhandler('j', avic_dump, "dump SVM AVIC", 1); +} For one the description should include the word "stats". And then I'm rather

Re: [Xen-devel] [PATCH v2 09/10] x86/SVM: Hook up miscellaneous AVIC functions

On 01/10/2017 04:00 PM, Jan Beulich wrote: On 10.01.17 at 09:35, wrote: On 01/05/2017 11:05 PM, Jan Beulich wrote: On 31.12.16 at 06:46, wrote: --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -1438,6

Re: [Xen-devel] [PATCH v2 01/10] x86/HVM: Introduce struct hvm_pi_ops

On 01/10/2017 03:24 PM, Jan Beulich wrote: On 10.01.17 at 07:51, wrote: On 01/05/2017 10:51 PM, Jan Beulich wrote: On 31.12.16 at 06:45, wrote: --- a/xen/include/asm-x86/hvm/domain.h +++ b/xen/include/asm-x86/hvm/domain.h @@

Re: [Xen-devel] [PATCH v2 09/10] x86/SVM: Hook up miscellaneous AVIC functions

Jan, On 01/05/2017 11:05 PM, Jan Beulich wrote: On 31.12.16 at 06:46, wrote: --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -1438,6 +1438,11 @@ static int svm_cpu_up(void) return 0; } +static inline int svm_avic_enabled(void) bool?

Re: [Xen-devel] [PATCH v2 03/10] x86/HVM: Call vlapic_destroy after vcpu_destroy

On 01/05/2017 10:56 PM, Jan Beulich wrote: On 31.12.16 at 06:45, wrote: Since vlapic_init() is called before vcpu_initialise(). We should call the destroy functions in the the reverse order here. Double "the". And to quote from my RFC reply: "Also the

Re: [Xen-devel] [PATCH v2 02/10] x86/vLAPIC: Declare vlapic_read_aligned() and vlapic_reg_write() as non-static

On 01/05/2017 10:53 PM, Jan Beulich wrote: On 31.12.16 at 06:45, <suravee.suthikulpa...@amd.com> wrote: Expose vlapic_read_aligned and vlapic_reg_write() to be used by AVIC. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Reviewed-by: Konrad Rzeszutek Wi

Re: [Xen-devel] [PATCH v2 01/10] x86/HVM: Introduce struct hvm_pi_ops

Jan, On 01/05/2017 10:51 PM, Jan Beulich wrote: On 31.12.16 at 06:45, wrote: --- a/xen/include/asm-x86/hvm/domain.h +++ b/xen/include/asm-x86/hvm/domain.h @@ -72,6 +72,67 @@ struct hvm_ioreq_server { bool_t bufioreq_atomic; }; +struct

Re: [Xen-devel] [PATCH v2 05/10] x86/HVM/SVM: Add AVIC initialization code

Hi Andrew, On 1/2/17 23:37, Andrew Cooper wrote: +ma = d->avic_phy_apic_id_table_mfn; +vmcb->avic_phy_apic_id = (ma << PAGE_SHIFT) & AVIC_HPA_MASK; +vmcb->avic_phy_apic_id |= AVIC_PHY_APIC_ID_MAX; Surely this should be some calculation derived from d->max_vcpus? This is actually

Re: [Xen-devel] [PATCH v2 10/10] x86/SVM: Add AMD AVIC key handler

Hi Boris/Andrew, On 1/3/17 23:04, Andrew Cooper wrote: On 03/01/17 16:01, Boris Ostrovsky wrote: +static void avic_dump(unsigned char ch) +{ +struct domain *d; +struct vcpu *v; + +printk("*** SVM AVIC Statistics **\n"); + +rcu_read_lock(_read_lock); + +

Re: [Xen-devel] [PATCH v2 06/10] x86/SVM: Add AVIC vmexit handlers

Hi Boris, On 1/3/17 22:34, Boris Ostrovsky wrote: +static int avic_handle_dfr_update(struct vcpu *v) +{ +u32 mod; +struct svm_domain *d = >domain->arch.hvm_domain.svm; +u32 *dfr = avic_get_bk_page_entry(v, APIC_DFR); + +if ( !dfr ) +return -EINVAL; + +mod = (*dfr >>

Re: [Xen-devel] [PATCH v2 06/10] x86/SVM: Add AVIC vmexit handlers

Hi Andrew, On 1/3/17 00:28, Andrew Cooper wrote: On 31/12/2016 05:45, Suravee Suthikulpanit wrote: [...] +case AVIC_INCMP_IPI_ERR_INV_TARGET: +dprintk(XENLOG_ERR, +"SVM: %s: Invalid IPI target (icr=%#08x:%08x, idx=%u)\n", +__func__, icrh, i

Re: [Xen-devel] [PATCH v2 05/10] x86/HVM/SVM: Add AVIC initialization code

Hi Andrew On 1/2/17 23:37, Andrew Cooper wrote: On 31/12/2016 05:45, Suravee Suthikulpanit wrote: [...] +/* + * Note: Current max index allowed for physical APIC ID table is 255. + */ +#define AVIC_PHY_APIC_ID_MAX0xFF + +#define AVIC_DOORBELL 0xc001011b + +#define AVIC_HPA_SHIFT

[Xen-devel] [PATCH v2 10/10] x86/SVM: Add AMD AVIC key handler

* post_intr = 116176 * doorbell = 715 VCPU 1 * incomp_ipi = 2565 * noaccel= 233061 * post_intr = 115765 * doorbell = 771 ********** Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Cc: Konrad Rzeszute

[Xen-devel] [PATCH v2 09/10] x86/SVM: Hook up miscellaneous AVIC functions

Hook up virtual_intr_delivery_enabled and deliver_posted_intr functions when AVIC is enabled. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Cc: Konrad Rzeszutek Wilk <konrad.w...@oracle.com> Cc: Jan Beulich <jbeul...@suse.com> Cc: Boris Ostrovsky <boris

[Xen-devel] [PATCH v2 08/10] x86/SVM: Add interrupt management code via AVIC

Enabling AVIC implicitly disables the V_IRQ, V_INTR_PRIO, V_IGN_TPR, and V_INTR_VECTOR fields in the VMCB Control Word. Therefore, this patch introduces new interrupt injection code via AVIC backing page. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Cc: Konrad Rze

[Xen-devel] [PATCH v2 02/10] x86/vLAPIC: Declare vlapic_read_aligned() and vlapic_reg_write() as non-static

Expose vlapic_read_aligned and vlapic_reg_write() to be used by AVIC. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Reviewed-by: Konrad Rzeszutek Wilk <konrad.w...@oracle.com> Cc: Boris Ostrovsky <boris.ostrov...@oracle.com> --- xen/arch/x86/hvm/v

[Xen-devel] [PATCH v2 00/10] Introduce AMD SVM AVIC

9.6064 AVIC w/o xen_nopv | 181.46 |171.7957 AVIC w/ xen_nopv | 171.81 |169.0858 CURRENT UNTESTED USE-CASES === - Nested VM Any feedback and comments are very much appreciated. Thank you, Suravee Suravee Suthikulpanit (10): x86/HVM: Int

[Xen-devel] [PATCH v2 07/10] x86/SVM: Add vcpu scheduling support for AVIC

Add hooks to manage AVIC data structure during vcpu scheduling. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Cc: Konrad Rzeszutek Wilk <konrad.w...@oracle.com> Cc: Jan Beulich <jbeul...@suse.com> Cc: Boris Ostrovsky <boris.ostrov...@oracle.com> -

[Xen-devel] [PATCH v2 06/10] x86/SVM: Add AVIC vmexit handlers

-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Cc: Konrad Rzeszutek Wilk <konrad.w...@oracle.com> Cc: Jan Beulich <jbeul...@suse.com> Cc: Boris Ostrovsky <boris.ostrov...@oracle.com> --- xen/arch/x86/hvm/svm/avic.c| 337 +++

[Xen-devel] [PATCH v2 03/10] x86/HVM: Call vlapic_destroy after vcpu_destroy

Since vlapic_init() is called before vcpu_initialise(). We should call the destroy functions in the the reverse order here. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Reviewed-by: Konrad Rzeszutek Wilk <konrad.w...@oracle.com> Cc: Boris Ostrovsky &

[Xen-devel] [PATCH v2 01/10] x86/HVM: Introduce struct hvm_pi_ops

The current function pointers for managing hvm posted interrupt can be used also by SVM AVIC. Therefore, this patch introduces the struct hvm_pi_ops in the struct hvm_domain to hold them. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Reviewed-by: Konrad Rzeszute

[Xen-devel] [PATCH v2 04/10] x86/SVM: Modify VMCB fields to add AVIC support

Introduce AVIC-related VMCB fields. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Reviewed-by: Konrad Rzeszutek Wilk <konrad.w...@oracle.com> Cc: Konrad Rzeszutek Wilk <konrad.w...@oracle.com> Cc: Jan Beulich <jbeul...@suse.com> Cc: Boris

[Xen-devel] [PATCH v2 05/10] x86/HVM/SVM: Add AVIC initialization code

. Currently, this svm-avic is disabled by default since it does not supported nested virtualization yet. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Cc: Jan Beulich <jbeul...@suse.com> Cc: Konrad Rzeszutek Wilk <konrad.w...@oracle.com> Cc: Boris Ostro

Re: [Xen-devel] [RFC PATCH 0/9] Introduce AMD SVM AVIC

On 12/22/16 18:38, Jan Beulich wrote: On 19.09.16 at 07:52, <suravee.suthikulpa...@amd.com> wrote: Suravee Suthikulpanit (9): x86/HVM: Introduce struct hvm_pi_ops x86/vLAPIC: Declare vlapic_read_aligned() and vlapic_reg_write() as non-static x86/HVM: Call vlapic_destroy

Re: [Xen-devel] [RFC PATCH 5/9] x86/HVM/SVM: Add AVIC initialization code

On 12/22/16 18:16, Jan Beulich wrote: On 19.09.16 at 07:52, wrote: +int svm_avic_init_vcpu(struct vcpu *v) +{ +struct vlapic *vlapic = vcpu_vlapic(v); +struct arch_svm_struct *s = >arch.hvm_svm; + +if ( svm_avic ) +s->avic_bk_pg =

Re: [Xen-devel] [RFC PATCH 4/9] x86/SVM: Modify VMCB fields to add AVIC support

On 12/22/16 18:11, Jan Beulich wrote: On 19.09.16 at 07:52, wrote: --- a/xen/include/asm-x86/hvm/svm/vmcb.h +++ b/xen/include/asm-x86/hvm/svm/vmcb.h @@ -328,14 +328,15 @@ typedef union __packed struct { u64 tpr: 8; -u64 irq:

Re: [Xen-devel] [PATCH 07/10] x86/SVM: use unambiguous register names

com> Reviewed-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> ___ Xen-devel mailing list Xen-devel@lists.xen.org https://lists.xen.org/xen-devel

Re: [Xen-devel] [PATCH 01/10] x86/MSR: introduce MSR access split/fold helpers

prefixed names for now where appropriate. Signed-off-by: Jan Beulich <jbeul...@suse.com> Reviewed-by: Kevin Tian <kevin.t...@intel.com> Reviewd-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> ___ Xen-devel mail

Re: [Xen-devel] [PATCH 2/3] x86/HVM: support (emulate) UMIP

On 12/7/16 23:06, Andrew Cooper wrote: On 07/12/16 15:39, Jan Beulich wrote: On 07.12.16 at 16:31, wrote: On 12/07/2016 10:14 AM, Jan Beulich wrote: On 07.12.16 at 16:10, wrote: On 12/07/2016 06:29 AM, Jan Beulich wrote: On 06.12.16

Re: [Xen-devel] AMD VMMCALL and VM86 mode

On 12/12/16 01:37, Andrew Cooper wrote: On 11/12/16 17:33, Boris Ostrovsky wrote: - andrew.coop...@citrix.com wrote: On 09/12/16 19:55, Andrew Cooper wrote: On 09/12/16 19:55, Boris Ostrovsky wrote: On 12/09/2016 02:01 PM, Andrew Cooper wrote: Hello, While working on XSA-192, I

Re: [Xen-devel] [PATCH V5] x86/vm_event: Added support for VM_EVENT_REASON_INTERRUPT

de trap delivery as done by the xc_hvm_inject_trap() hypercall). OK then. Acked-by: Kevin Tian <kevin.t...@intel.com> AFAIK this has been acked by everyone a while back, Has it? I've meant to apply it the other day, but couldn't find any ARM or AMD SVM maintainer acks. Jan Acked-by:

Re: [Xen-devel] [PATCH v2] AMD IOMMU: Support IOAPIC IDs larger than 128

On 12/12/16 21:46, Jan Beulich wrote: On 05.12.16 at 20:36, wrote: +unsigned int ioapic_id_to_index(unsigned int apic_id) +{ +unsigned int idx; + +if ( !nr_ioapic_sbdf ) +return MAX_IO_APICS; This is pointless (redundant with ... +for (

Re: [Xen-devel] AMD VMMCALL and VM86 mode

Hi Andrew/Boris, On 12/12/16 01:37, Andrew Cooper wrote: On 11/12/16 17:33, Boris Ostrovsky wrote: - andrew.coop...@citrix.com wrote: On 09/12/16 19:55, Andrew Cooper wrote: On 09/12/16 19:55, Boris Ostrovsky wrote: On 12/09/2016 02:01 PM, Andrew Cooper wrote: Hello, While working on

Re: [Xen-devel] [RFC PATCH 6/9] x86/SVM: Add AVIC vmexit handlers

Hi Konrad, Thanks for review comments. On 10/14/2016 10:20 PM, Konrad Rzeszutek Wilk wrote: On Mon, Sep 19, 2016 at 12:52:45AM -0500, Suravee Suthikulpanit wrote: AVIC introduces two #vmexit handlers: + * IPIs when the specified Message Type is Fixed + * (also known as fixed

[Xen-devel] [PATCH v2] AMD IOMMU: Support IOAPIC IDs larger than 128

ned-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Cc: Jan Beulich <jbeul...@suse.com> Cc: Boris Ostrovsky <boris.ostrov...@oracle.com> --- Changes in V2: * Fix logic error pointed out by Jan in parse_ivrs_ioapic(), parse_ivhd_device_specia

Re: [Xen-devel] [PATCH] AMD IOMMU: Support IOAPIC IDs larger than 128

Hi Jan, On 12/1/16 18:58, Jan Beulich wrote: On 01.12.16 at 12:04, wrote: @@ -1028,15 +1036,15 @@ static int __init parse_ivrs_table(struct acpi_table_header *table) if ( !nr_ioapic_entries[apic] ) continue; -if (

Re: [Xen-devel] [RFC PATCH 0/9] Introduce AMD SVM AVIC

Boris, On 9/20/16 21:34, Boris Ostrovsky wrote: BENCHMARK 1: HACKBENCH > == > > For measuring IPI performance used for scheduling workload, I have collected > some performance number on 2 and 3 CPU running hackbech with the following > detail: > > hackbench -p -l 10 >

Re: [Xen-devel] [PATCH] AMD IOMMU: Support IOAPIC IDs larger than 128

Hi Jan, On 12/01/2016 06:58 PM, Jan Beulich wrote: On 01.12.16 at 12:04, wrote: Currently, the driver uses the APIC ID to index into the ioapic_sbdf array. The current MAX_IO_APICS is 128, which causes the driver initialization to fail on the system with IOAPIC

[Xen-devel] [PATCH] AMD IOMMU: Support IOAPIC IDs larger than 128

ned-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Cc: Jan Beulich <jbeul...@suse.com> Cc: Boris Ostrovsky <boris.ostrov...@oracle.com> --- xen/drivers/passthrough/amd/iommu_acpi.c | 80 +++ xen/drivers/passthrough/amd/i

Re: [Xen-devel] [RFC PATCH 5/9] x86/HVM/SVM: Add AVIC initialization code

On 11/17/16 11:18, Konrad Rzeszutek Wilk wrote: On Thu, Nov 17, 2016 at 10:05:58AM -0600, Suravee Suthikulpanit wrote: Konrad, Thanks for the review comments. Got one quick question below. On 10/12/16 15:02, Konrad Rzeszutek Wilk wrote: +int svm_avic_init_vmcb(struct vcpu *v

Re: [Xen-devel] [RFC PATCH 5/9] x86/HVM/SVM: Add AVIC initialization code

Konrad, On 10/12/16 15:02, Konrad Rzeszutek Wilk wrote: + > +/* NOTE: Current max index allowed for physical APIC ID table is 255 */ > +#define AVIC_PHY_APIC_ID_MAX0xFF > + > +#define AVIC_DOORBELL 0xc001011b > +#define AVIC_HPA_MASK ~((0xFFFULL << 52) || 0xFFF) >

Re: [Xen-devel] [RFC PATCH 5/9] x86/HVM/SVM: Add AVIC initialization code

Konrad, Thanks for the review comments. Got one quick question below. On 10/12/16 15:02, Konrad Rzeszutek Wilk wrote: +int svm_avic_init_vmcb(struct vcpu *v) > +{ > +paddr_t ma; > +u32 apic_id_reg; > +struct arch_svm_struct *s = >arch.hvm_svm; > +struct vmcb_struct *vmcb =

Re: [Xen-devel] [RFC PATCH 0/9] Introduce AMD SVM AVIC

On 9/19/16 20:09, Konrad Rzeszutek Wilk wrote: On Mon, Sep 19, 2016 at 12:52:39AM -0500, Suravee Suthikulpanit wrote: GITHUB == Latest git tree can be found at: http://github.com/ssuthiku/xen.gitxen_avic_part1_v1 OVERVIEW This patch set is the first of the two-part patch

[Xen-devel] [RFC PATCH 7/9] x86/SVM: Add vcpu scheduling support for AVIC

Add hooks to manage AVIC data structure during vcpu scheduling. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> --- xen/arch/x86/hvm/svm/avic.c | 82 + xen/arch/x86/hvm/svm/svm.c | 10 ++ 2 files changed, 92 inse

[Xen-devel] [RFC PATCH 0/9] Introduce AMD SVM AVIC

inux guest is built w/o Xen guest support. CURRENT UNTESTED USE-CASES === - Nested VM Any feedback and comments are very much appreciated. Thank you, Suravee Suravee Suthikulpanit (9): x86/HVM: Introduce struct hvm_pi_ops x86/vLAPIC: Declare vlapic_re

[Xen-devel] [RFC PATCH 9/9] x86/SVM: Hook up miscellaneous AVIC functions

Hook up virtual_intr_delivery_enabled and deliver_posted_intr functions when AVIC is enabled. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> --- xen/arch/x86/hvm/svm/svm.c | 10 ++ xen/include/asm-x86/hvm/svm/avic.h | 5 + 2 files changed, 15 inse

[Xen-devel] [RFC PATCH 8/9] x86/SVM: Add interrupt management code via AVIC

. Therefore, xen does not need to handle this when enable AVIC. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> --- xen/arch/x86/hvm/svm/avic.c| 31 +++ xen/arch/x86/hvm/svm/intr.c| 4 xen/arch/x86/hvm/svm/svm.c

[Xen-devel] [RFC PATCH 2/9] x86/vLAPIC: Declare vlapic_read_aligned() and vlapic_reg_write() as non-static

Expose vlapic_read_aligned and vlapic_reg_write() to be used by AVIC. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> --- xen/arch/x86/hvm/vlapic.c| 5 ++--- xen/include/asm-x86/hvm/vlapic.h | 4 2 files changed, 6 insertions(+), 3 deletions(-) diff --git

[Xen-devel] [RFC PATCH 1/9] x86/HVM: Introduce struct hvm_pi_ops

The current function pointers for managing hvm posted interrupt can be used also by SVM AVIC. Therefore, this patch introduces the struct hvm_pi_ops in the struct hvm_domain to hold them. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> --- xen/arch/x86/hvm/vmx

[Xen-devel] [RFC PATCH 4/9] x86/SVM: Modify VMCB fields to add AVIC support

Introduce AVIC-related VMCB fields. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> --- xen/include/asm-x86/hvm/svm/vmcb.h | 23 +++ 1 file changed, 15 insertions(+), 8 deletions(-) diff --git a/xen/include/asm-x86/hvm/svm/vmcb.h b/xen/include/a

[Xen-devel] [RFC PATCH 3/9] x86/HVM: Call vlapic_destroy after vcpu_destroy

Since vlapic_init() is called before vcpu_initialise(). We should also follow the same order here. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> --- xen/arch/x86/hvm/hvm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c

[Xen-devel] [RFC PATCH 5/9] x86/HVM/SVM: Add AVIC initialization code

. Currently, this svm-avic is disabled by default. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> --- xen/arch/x86/hvm/svm/Makefile | 1 + xen/arch/x86/hvm/svm/avic.c| 217 + xen/arch/x86/hvm/svm/svm.c | 17 ++

[Xen-devel] [RFC PATCH 6/9] x86/SVM: Add AVIC vmexit handlers

AVIC introduces two #vmexit handlers: * VMEXIT_INCOMP_IPI * VMEXIT_DO_NOACCEL Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> --- xen/arch/x86/hvm/svm/avic.c| 279 + xen/arch/x86/hvm/svm/svm.c | 8 ++ xen/inclu

Re: [Xen-devel] [PATCH v3 0/3] Fix xen crash when starting HVM guest due to missing io handler

+ Rüdiger This patch series should help fixing the issue you are seeing. Thanks, Suravee On 05/21/2016 06:42 PM, suravee.suthikulpa...@amd.com wrote: From: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> Hi All, Changes from V2: * Use assert instead of sanity check before

Re: [Xen-devel] [PATCH] AMD IOMMU: Introduce support for IVHD block type 11h

Hi Jan, On 05/19/2016 04:09 AM, Jan Beulich wrote: >>>+int __init amd_iommu_get_supported_ivhd_type(void) >>>+{ >>>+if ( unlikely(acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_MSI) ) >>>+return -EPERM; >> >>This check appears out of the blue, and isn't being mentioned in >>the

Re: [Xen-devel] [PATCH] AMD IOMMU: Introduce support for IVHD block type 11h

Hi Jan, On 05/17/2016 09:25 AM, Jan Beulich wrote: On 13.05.16 at 21:54, wrote: --- a/xen/drivers/passthrough/amd/iommu_acpi.c +++ b/xen/drivers/passthrough/amd/iommu_acpi.c [...] @@ -901,7 +911,7 @@ static int __init parse_ivhd_block(const struct

Re: [Xen-devel] [PATCH V2 2/2] svm: iommu: Only call guest_iommu_init() after initialized HVM domain

om >Cc: Paul Durrant; Suravee Suthikulpanit; Suravee Suthikulpanit >Subject: [PATCH V2 2/2] svm: iommu: Only call guest_iommu_init() after >initialized HVM domain > >From: Suravee Suthikulpanit<suravee.suthikulpa...@amd.com> > >The guest_iommu_init() is currently called by th

Re: [Xen-devel] [PATCH V2 1/2] x86/hvm: Add check when register io handler

Hi Paul, On 05/16/2016 03:01 AM, Paul Durrant wrote: -Original Message- >From:suravee.suthikulpa...@amd.com >[mailto:suravee.suthikulpa...@amd.com] >Sent: 13 May 2016 20:37 >To:xen-devel@lists.xen.org; George Dunlap;jbeul...@suse.com >Cc: Paul Durrant; Suravee Suthiku

[Xen-devel] [PATCH 1/2] xen/arm: gic: Refactor the code for creating gic node

to gic_make_node() wrapper to be after all other generic properties are setup. This allows creating sub-node inside gic_make_node() in order to support v2m sub-node. Signed-off-by: Suravee Suthikulpanit suravee.suthikulpa...@amd.com --- xen/arch/arm/domain_build.c | 18 +++--- xen/arch/arm/gic-hip04

[Xen-devel] [PATCH 2/2] xen/arm: gicv2: Adding support for GICv2m in Dom0

This patch detect and propagate the gic-v2m-frame devicetree sub-node. This allows Dom0 kernel to setup and intialize GICv2m MSI frame. Signed-off-by: Suravee Suthikulpanit suravee.suthikulpa...@amd.com --- xen/arch/arm/gic-v2.c | 169 ++ 1 file

[Xen-devel] [PATCH 0/2] Introducing GICv2m Supports

kernel: git clone https://github.com/ssuthiku/linux.git xen-seattle-revA-pci Suravee Suthikulpanit (2): xen/arm: gic: Refactor the code for creating gic node xen/arm: gicv2: Adding support for GICv2m in Dom0 xen/arch/arm/domain_build.c | 18 - xen/arch/arm/gic-hip04.c| 4 - xen

Re: [Xen-devel] [PATCH for-4.6 0/5] xen: arm: Parse PCI DT nodes' ranges and interrupt-map

On 10/24/2014 04:58 AM, Ian Campbell wrote: This message has been archived. View the original item http://ausev2.amd.com/EnterpriseVault/ViewMessage.asp?VaultId=18C5C586ACEF6BE42BD5DBA644C96C94F111amdvault.amd.comSavesetId=201411267046116~2014102410~Z~F141820FA2B2A99F4BA9EAD48EEB5211