On Mon, May 4, 2015 at 6:34 PM, Julien Grall julien.gr...@citrix.com wrote:
On 04/05/2015 13:58, Vijay Kilari wrote:
On Thu, Apr 30, 2015 at 7:59 PM, Julien Grall julien.gr...@citrix.com
wrote:
Hi,
On 30/04/15 14:47, Stefano Stabellini wrote:
If the devid is not within this range
On Mon, May 4, 2015 at 7:24 PM, Julien Grall julien.gr...@citrix.com wrote:
On 04/05/2015 14:44, Julien Grall wrote:
Hi Vijay,
On 04/05/2015 14:27, Vijay Kilari wrote:
On Mon, May 4, 2015 at 6:34 PM, Julien Grall julien.gr...@citrix.com
wrote:
On 04/05/2015 13:58, Vijay Kilari wrote
On Thu, Apr 30, 2015 at 3:45 PM, Stefano Stabellini
stefano.stabell...@eu.citrix.com wrote:
On Thu, 30 Apr 2015, Julien Grall wrote:
Hi Stefano,
On 30/04/2015 11:02, Stefano Stabellini wrote:
On Wed, 29 Apr 2015, Julien Grall wrote:
On 29/04/15 17:30, Vijay Kilari wrote:
On Wed, Apr
On Wed, Apr 29, 2015 at 9:56 PM, Vijay Kilari vijay.kil...@gmail.com wrote:
Hi Julien,
On Wed, Apr 29, 2015 at 7:05 PM, Julien Grall julien.gr...@citrix.com wrote:
On 29/04/15 12:56, Julien Grall wrote:
As the 2 suggested approach don't seem to fit our usage, we need to find
another approach
Hi Julien,
On Wed, Apr 29, 2015 at 7:05 PM, Julien Grall julien.gr...@citrix.com wrote:
On 29/04/15 12:56, Julien Grall wrote:
As the 2 suggested approach don't seem to fit our usage, we need to find
another approach.
I think I have another approach which doesn't require interrupt neither
On Tue, Apr 28, 2015 at 4:05 PM, Julien Grall julien.gr...@citrix.com wrote:
Hi,
On 28/04/15 10:56, Stefano Stabellini wrote:
On Tue, 28 Apr 2015, Vijay Kilari wrote:
Approach 1: (Using completion interrupt)
1) Create dummy device for each virtual ITS when virtual its
On Tue, Apr 28, 2015 at 9:45 PM, Julien Grall julien.gr...@citrix.com wrote:
Hi Vijay,
On 28/04/15 12:36, Vijay Kilari wrote:
On Tue, Apr 28, 2015 at 4:05 PM, Julien Grall julien.gr...@citrix.com
wrote:
If you properly manage the device with struct pci_dev or struct device
(which
On Thu, Apr 2, 2015 at 7:17 PM, Julien Grall julien.grall@gmail.com wrote:
Hi Ian,
On 02/04/2015 12:18, Ian Campbell wrote:
On Thu, 2015-04-02 at 12:06 +0100, Julien Grall wrote:
Can we just enqueue with the hardware and use the guest vcpu polling
loop to trigger us to check for
On Tue, Apr 14, 2015 at 6:42 PM, Ian Campbell ian.campb...@citrix.com wrote:
On Mon, 2015-04-13 at 09:35 +0100, Jan Beulich wrote:
On 02.04.15 at 12:01, ian.campb...@citrix.com wrote:
On Thu, 2015-03-26 at 17:07 +, Jan Beulich wrote:
having been released mid January, it is time to get
On Wed, Apr 1, 2015 at 5:04 PM, Ian Campbell ian.campb...@citrix.com wrote:
On Thu, 2015-03-19 at 20:07 +0530, vijay.kil...@gmail.com wrote:
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
This patch just makes ITS driver taken from linux
compiles in xen environment.
What is your
On Thu, Apr 2, 2015 at 2:55 PM, Ian Campbell ian.campb...@citrix.com wrote:
On Thu, 2015-04-02 at 13:55 +0530, Vijay Kilari wrote:
On Wed, Apr 1, 2015 at 5:04 PM, Ian Campbell ian.campb...@citrix.com wrote:
On Thu, 2015-03-19 at 20:07 +0530, vijay.kil...@gmail.com wrote:
From: Vijaya Kumar K
Hi Julien,
On Fri, Mar 20, 2015 at 10:14 PM, Julien Grall julien.gr...@linaro.org wrote:
Hello Vijay,
On 19/03/2015 14:37, vijay.kil...@gmail.com wrote:
diff --git a/xen/include/asm-arm/irq.h b/xen/include/asm-arm/irq.h
index 435dfcd..f091739 100644
--- a/xen/include/asm-arm/irq.h
+++
Hi Julien,
On Tue, Mar 24, 2015 at 5:18 PM, Julien Grall julien.gr...@linaro.org wrote:
Hello Vijay,
More questions/remarks about command processing.
On 19/03/2015 14:38, vijay.kil...@gmail.com wrote:
+int vgic_its_process_cmd(struct vcpu *v, struct vgic_its *vits)
+{
+struct
Hi Andrew,
On Wed, Mar 25, 2015 at 9:32 PM, Andrew Cooper
andrew.coop...@citrix.com wrote:
On 20/03/15 13:17, Vijay Kilari wrote:
Hi Andrew,
On Wed, Mar 11, 2015 at 4:21 PM, Andrew Cooper
andrew.coop...@citrix.com wrote:
On 11/03/15 05:32, Vijay Kilari wrote:
Hi Andrew,
From Ian
Hi,
Dom0 fails to boot with Xen with CONFIG_ARM64_64K_PAGES enabled because of
map_vcpu_info() make check of page offset based of PAGE_SIZE which is 4K in Xen.
Is this know issue that is fixed?. I am using 4.5 rc1 Xen code base.
Log below:
(XEN) DOM0: [0.173539] If your platform has any
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
On x86, for the pages mapped with PAGE_HYPERVISOR attribute
non-leaf page tables are allocated with valid pte entries.
and with MAP_SMALL_PAGES attribute only non-leaf page tables are
allocated with invalid (valid bit set to 0) pte entries.
On Fri, Mar 20, 2015 at 9:53 PM, Julien Grall julien.gr...@linaro.org wrote:
Hi Vijay,
On 19/03/2015 14:37, vijay.kil...@gmail.com wrote:
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Add ITS support for arm. Following major features
are supported
- GICv3 ITS support for arm64
Hi Julien,
On Fri, Mar 20, 2015 at 8:36 PM, Julien Grall julien.gr...@linaro.org wrote:
Hello Vijay,
On 19/03/2015 14:37, vijay.kil...@gmail.com wrote:
static LIST_HEAD(its_nodes);
static DEFINE_SPINLOCK(its_lock);
-static struct device_node *gic_root_node;
-static struct rdists
On Mon, Mar 23, 2015 at 9:00 PM, Julien Grall julien.gr...@linaro.org wrote:
On 23/03/15 15:18, Vijay Kilari wrote:
The ITS still have to manage in someway the device. There is lots of
information that doesn't need to be created at every mapd (such as the
number of MSI).
First assumption
Hi Andrew,
On Wed, Mar 11, 2015 at 4:21 PM, Andrew Cooper
andrew.coop...@citrix.com wrote:
On 11/03/15 05:32, Vijay Kilari wrote:
Hi Andrew,
From Ian Stefano, I came to know that you have introduced
Migration framework v2
under below patch series
http://marc.info/?l=xen-develm
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Add helper functions to decode ITS command
This will be useful for Virtual ITS driver
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
xen/include/asm-arm/gic-its.h | 45 +
1 file
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Add ITS support for arm. Following major features
are supported
- GICv3 ITS support for arm64 platform
- Supports multi ITS node
- LPI descriptors are allocated on-demand
- Only ITS Dom0 is supported
Tested with single ITS node.
Major
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
ITS driver does not require functionality to
create/free device. This will be handled by virtual
ITS driver.
The functionality of ITS driver will be limited to
initialization, physical lpi allocation,
sending ITS commands received from Virtual
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Use newly introduced linked list helper functions in
page_list* functions
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
CC: Jan Beulich jbeul...@suse.com
---
xen/include/xen/mm.h | 10 --
1 file changed, 4
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
With this patch add emulation of GICR registers for LPIs.
Also add LPI property table emulation.
Domain's LPI property table is unmapped during domain init
on LPIPROPBASE update and trapped on LPI property
table read and write
Signed-off-by:
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
bitmap_find_next_zero_area helper function will be used
by physical ITS driver imported from linux
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
xen/arch/arm/arm64/lib/find_next_bit.c | 39
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Introduce new fields in arch_irq_desc for to hold
virtual irq number and pointer to its device.
Also introduced helper function to read and update
device pointer in arch_irq_desc
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
This patch just makes ITS driver taken from linux
compiles in xen environment.
The following changes are done
- memory allocation apis are changed
- raw spin lock api's changed to normal spin lock api's
- debug prints changed to xen
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Add missing linked list apis from kernel
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
CC: Jan Beulich jbeul...@suse.com
---
v2: Add additional linked apis like list_last_entry_or_null,
list_next_entry and list_prev_entry
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
This patch implements hw_irq_controller api's required
to handle LPI's.
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
v2: - Reused hw_irq_controller ops of gicv3 for LPIs
---
xen/arch/arm/gic-v3-its.c | 103
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
ITS command encode functions are moved to
header file gits-its.h and made as inline functions.
This will be useful later in virtual its driver
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
xen/arch/arm/gic-v3-its.c |
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Add Virtual ITS command processing support to
Virtual ITS driver. Also add API's to in physical
ITS driver to send commands from Virtual ITS driver.
In this patch, following are done
-Physical ITS driver will allocate physical LPI for
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
The its_device structure can be reused in virtual ITS
driver. So move this to gic-its.h file
Also the physical LPI allocation code of physical ITS
driver is used.
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Number of LPIs supported by GICv3 is huge. Boot time
allocation of irq descriptors and pending_irq descritors
is not viable.
With this patch, allocate irq/pending_irq descritors for
LPIs on-demand and manage using radix tree
Signed-off-by:
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Add support for handling ITS(LPI) interrupts.
The LPI interrupts are handled by physical ITS
driver.
nested LPI interrupt handling is not tested and
enabled.
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
v2: - Removed
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
ITS translation space contains GITS_TRANSLATOR
register which is written by device to raise
LPI. This space needs to mapped to every domain
address space for all physical ITS available,
so that device can access GITS_TRANSLATOR
register using
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Add support for emulating GITS_* registers
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
v2: - Each Virtual ITS is attached to Physical ITS.
- Introduce helper function to lock and unlock
virtual ITS lock.
-
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Intialize physical ITS driver and virtual ITS driver
based on HW support information available in GICD_TYPER
register.
Based on outcome of lpi_supported() and gic_nr_id_bits()
functions ITS driver is initialized
Signed-off-by: Vijaya Kumar K
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
This is actual GICv3 ITS driver from linux (4.0_rc4)
with latest commit id: 4559fbb3a9b1bde46afc739fa6c300826acdc19c
No xen related changes are made and is not compiled.
This helps to import any issues found in linux
Signed-off-by: Vijaya
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Separate redistributor information into rdist and rdist_prop
structures.
The rdist_prop holds the redistributor common information
and rdist holds the per cpu specific information.
This percpu rdist defined as global and shared with ITS
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Generate ITS device tree node for DomU.
This patch generate ITS node outside the GICv3 node
for DomU.
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
tools/libxl/libxl_arm.c | 36
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Parse host dt and generate ITS node for Dom0.
ITS node resides inside GIC node so when GIC node
is encountered look for ITS node.
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
v2: - Generate all available ITS node in host
Hi Ian,
On Thu, Mar 5, 2015 at 10:40 PM, Ian Campbell ian.campb...@citrix.com wrote:
On Thu, 2015-03-05 at 16:46 +, Ian Campbell wrote:
On Wed, 2015-03-04 at 11:36 +0530, vijay.kil...@gmail.com wrote:
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Add GSER region to thunderx
On Mon, Mar 16, 2015 at 6:45 PM, Julien Grall julien.gr...@linaro.org wrote:
Hi Vijay,
On 16/03/15 09:55, Vijay Kilari wrote:
On Fri, Mar 13, 2015 at 4:05 PM, Julien Grall julien.gr...@linaro.org
wrote:
On 13/03/2015 10:24, Julien Grall wrote:
Hello Vijay,
On 02/03/2015 12:30
Hi Julien,
On Fri, Mar 13, 2015 at 5:16 PM, Julien Grall julien.gr...@linaro.org wrote:
Hello Vijay,
On 02/03/2015 12:30, vijay.kil...@gmail.com wrote:
@@ -228,10 +242,10 @@ static struct its_collection
*its_build_mapd_cmd(struct its_cmd_block *cmd,
On Fri, Mar 13, 2015 at 3:43 PM, Julien Grall julien.gr...@linaro.org wrote:
Hi Vijay,
On 13/03/2015 04:48, Vijay Kilari wrote:
The changes that I envisage for supporting Multiple ITS is
- Generate as many number of ITS dt nodes for Dom0 that host DT
contains.
- For DomU always
On Fri, Mar 13, 2015 at 4:05 PM, Julien Grall julien.gr...@linaro.org wrote:
On 13/03/2015 10:24, Julien Grall wrote:
Hello Vijay,
On 02/03/2015 12:30, vijay.kil...@gmail.com wrote:
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
This is actual GICv3 ITS driver from linux.
No xen
On Mon, Mar 16, 2015 at 7:50 PM, Julien Grall julien.gr...@linaro.org wrote:
On 16/03/15 14:06, Vijay Kilari wrote:
@@ -343,17 +357,23 @@ static int its_queue_full(struct its_node *its)
static struct its_cmd_block *its_allocate_entry(struct its_node *its)
{
struct its_cmd_block *cmd
Hi Julien,
On Mon, Mar 9, 2015 at 11:46 PM, Julien Grall julien.gr...@linaro.org wrote:
Hello Vijay,
On 09/03/2015 14:57, Vijay Kilari wrote:
On Tue, Mar 3, 2015 at 5:13 PM, Julien Grall julien.gr...@linaro.org
wrote:
Hello Vijay,
On 03/03/2015 03:55, Vijay Kilari wrote:
On Mon, Mar
On Tue, Mar 10, 2015 at 5:22 PM, Ian Campbell ian.campb...@citrix.com wrote:
On Tue, 2015-03-10 at 11:45 +, Julien Grall wrote:
On 09/03/15 16:08, Vijay Kilari wrote:
On Mon, Mar 9, 2015 at 5:46 PM, Julien Grall julien.gr...@linaro.org
wrote:
Hi Vijay,
Given the introduction
Hi Andrew,
From Ian Stefano, I came to know that you have introduced
Migration framework v2
under below patch series
http://marc.info/?l=xen-develm=141036915311145
I have few queries:
1) Is there any plans/timeline to support for ARM32/ARM64?.
2) Also does the Domain Image format
On Tue, Mar 3, 2015 at 10:58 PM, Stefano Stabellini
stefano.stabell...@eu.citrix.com wrote:
On Mon, 2 Mar 2015, vijay.kil...@gmail.com wrote:
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
This patch implements hw_irq_controller api's required
to handle LPI's.
Signed-off-by: Vijaya
On Tue, Mar 3, 2015 at 5:13 PM, Julien Grall julien.gr...@linaro.org wrote:
Hello Vijay,
On 03/03/2015 03:55, Vijay Kilari wrote:
On Mon, Mar 2, 2015 at 6:49 PM, Julien Grall julien.gr...@linaro.org
wrote:
On 02/03/15 12:30, vijay.kil...@gmail.com wrote:
From: Vijaya Kumar K vijaya.ku
On Mon, Mar 9, 2015 at 5:46 PM, Julien Grall julien.gr...@linaro.org wrote:
Hi Vijay,
Given the introduction of the new helper, the title looks wrong to me.
On 09/03/2015 08:59, vijay.kil...@gmail.com wrote:
diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 7d4ba0c..e0be36b 100644
On Mon, Mar 9, 2015 at 9:39 PM, Stefano Stabellini
stefano.stabell...@eu.citrix.com wrote:
On Mon, 9 Mar 2015, Vijay Kilari wrote:
On Tue, Mar 3, 2015 at 10:58 PM, Stefano Stabellini
stefano.stabell...@eu.citrix.com wrote:
On Mon, 2 Mar 2015, vijay.kil...@gmail.com wrote:
From: Vijaya Kumar
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
On x86, for the pages mapped with PAGE_HYPERVISOR attribute
non-leaf page tables are allocated with valid pte entries.
and with MAP_SMALL_PAGES attribute only non-leaf page tables are
allocated with invalid (valid bit set to 0) pte entries.
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
On x86, for the pages mapped with PAGE_HYPERVISOR attribute
non-leaf page tables are allocated with valid pte entries.
and with MAP_SMALL_PAGES attribute only non-leaf page tables are
allocated with invalid (valid bit set to 0) pte entries.
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
psci node is generated by xen for dom0.
if the host device tree has psci-0.2 skip parsing this node
and avoid copying from host device tree to dom0 device tree.
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Acked-by: Ian
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Add basic support for Cavium ThunderX platform
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
v3 changes:
- Made Thunderx specific mappings as separate patch
- Improved printk error message
v2 changes:
- Update
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Add GSER region to thunderx platfrom specific mappings.
This region is not mentioned in DT. This is required by
PCI driver to detect and configure pci devices attached.
In future we can remove this mapping, if pci driver
in Dom does not
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Changes in v3:
- Made ThunderX GSER region mapping as separate patch
- Updated patch 3 commit message
Changes in v2:
- Updated patch 3 commit message
- Updated processor_implementers[] with implementor info
in xen/arch/arm/setup.c
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
ThunderX platform uses pl011 uart.
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Acked-by: Ian Campbell ian.campb...@citrix.com
---
xen/arch/arm/Rules.mk |4
1 file changed, 4 insertions(+)
diff --git
On Tue, Mar 3, 2015 at 2:33 PM, Ian Campbell ian.campb...@citrix.com wrote:
On Tue, 2015-03-03 at 10:39 +0530, Vijay Kilari wrote:
On Mon, Feb 23, 2015 at 11:21 PM, Ian Campbell ian.campb...@citrix.com
wrote:
On Wed, 2015-02-18 at 12:38 +, Julien Grall wrote:
+uint64_t addr, size
On Tue, Feb 24, 2015 at 6:29 PM, Julien Grall julien.gr...@linaro.org wrote:
On 24/02/15 10:26, Ian Campbell wrote:
On Tue, 2015-02-24 at 09:38 +, Julien Grall wrote:
Hi Ian,
On 24/02/2015 09:31, Ian Campbell wrote:
On Wed, 2015-02-18 at 13:03 +, Julien Grall wrote:
+
Hi Julien,
On Mon, Mar 2, 2015 at 6:49 PM, Julien Grall julien.gr...@linaro.org wrote:
Hi Vijay,
On 02/03/15 12:30, vijay.kil...@gmail.com wrote:
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Add ITS support for arm. Following major features
are supported
- GICv3 ITS support for
On Mon, Feb 23, 2015 at 11:21 PM, Ian Campbell ian.campb...@citrix.com wrote:
On Wed, 2015-02-18 at 12:38 +, Julien Grall wrote:
+uint64_t addr, size;
Please use paddr_t and PRIpaddr etc.
+res = map_mmio_regions(d,
+ paddr_to_pfn(addr PAGE_MASK),
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
This patch implements hw_irq_controller api's required
to handle LPI's.
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
xen/arch/arm/gic-v3-its.c | 104 -
xen/arch/arm/gic.c
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Add Virtual ITS command processing support to
Virtual ITS driver. Also add API's to in physical
ITS driver to send commands from Virtual ITS driver.
For now, this driver can handle one physical ITS node.
If platform has more than one physical
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Add support for emulating GITS_* registers
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
xen/arch/arm/gic-v3-its.c |9 +
xen/arch/arm/vgic-v3-its.c| 369 -
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
With this patch add emulation of GICR registers for LPIs.
Also add LPI property table emulation.
Domain's LPI property table is unmapped during domain init
on LPIPROPBASE update and trapped on LPI property
table read and write
Signed-off-by:
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
ITS translation space contains GITS_TRANSLATOR
register which is written by device to raise
LPI. This space needs to mapped to every domain
address space so that device can access GITS_TRANSLATOR
register using SMMU
Signed-off-by: Vijaya Kumar
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
This is actual GICv3 ITS driver from linux.
No xen related changes are made and is not compiled.
This helps to import any issues found in linux
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
xen/arch/arm/gic-v3-its.c |
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Introduce new fields in irq descriptors for
LPI support. data field to hold irq related data
and virq to hold virtual lpi number for the corresponding
irq
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
xen/arch/arm/irq.c
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
The LPI allocation is handled by virtual ITS driver on
receiving ITS commands from domain. So move this functionality
from physical ITS driver to Virtual ITS driver.
This patch does not add any virtual its funtionality
except moving required
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Given the physical address of the page, get
the maddr to map in Xen to access domain's memory.
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
xen/arch/arm/p2m.c| 24
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Intialize physical ITS driver and virtual ITS driver
based on HW support information available in GICD_TYPER
register.
Based on outcome of lpi_supported() and gic_nr_id_bits()
functions ITS driver is initialized
Signed-off-by: Vijaya Kumar K
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Parse host dt and generate ITS node for Dom0.
ITS node resides inside GIC node so when GIC node
is encountered look for ITS node.
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
xen/arch/arm/domain_build.c | 59
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Add support for handling ITS(LPI) interrupts.
The LPI interrupts are handled by physical ITS
driver.
nested LPI interrupt handling is not tested and
enabled.
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Separate redistributor information into rdist and rdist_prop
structures.
The rdist_prop holds the redistributor common information
and rdist holds the per cpu specific information.
This percpu rdist defined as global and shared with ITS
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Number of LPIs supported by GICv3 is huge. Boot time
allocation of irq descriptors and pending_irq descritors
is not viable.
With this patch, allocate irq/pending_irq descritors for
LPIs on-demand and manage using radix tree
Signed-off-by:
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
ITS command encode functions are moved to
header file gits-its.h and made as inline functions.
This will be useful later in virtual its driver
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
xen/arch/arm/gic-v3-its.c |
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Add missing linked list apis from kernel
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
CC: Jan Beulich jbeul...@suse.com
---
xen/include/xen/list.h | 33 +
1 file changed, 33 insertions(+)
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
This patch just makes ITS driver taken from linux
compiles in xen environment.
The following changes are done
- memory allocation apis are changed
- raw spin lock api's changed to normal spin lock api's
- debug prints changed to xen debug
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
ITS driver does not require functionality to
create/free device. This will be handled by virtual
ITS driver.
The functionality of ITS driver will be limited to
initialization, sending ITS commands received from
Virtual ITS driver and ITS
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Add helper functions to decode ITS command
This will be useful for Virtual ITS driver
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
xen/include/asm-arm/gic-its.h | 45 +
1 file
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Add ITS support for arm. Following major features
are supported
- GICv3 ITS support for arm64 platform
- Supports only single ITS node
- LPI descriptors are allocated on-demand
- Only ITS Dom0 is supported
Vijaya Kumar K (19):
xen/arm:
On Wed, Feb 25, 2015 at 3:50 PM, Ian Campbell ian.campb...@citrix.com wrote:
On Wed, 2015-02-25 at 08:03 +0530, Manish Jaggi wrote:
On 24/02/15 7:13 pm, Julien Grall wrote:
On 24/02/15 00:23, Manish Jaggi wrote:
Because you have to parse all the device tree to remove the reference
to the
On Thu, Feb 19, 2015 at 7:33 PM, Julien Grall julien.gr...@linaro.org wrote:
On 19/02/15 07:17, vijay.kil...@gmail.com wrote:
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
For arm memory for 1024 irq descriptors are allocated
statically irrespective of number of interrupt supported
by
Hi Julien,
On Mon, Feb 23, 2015 at 9:10 PM, Julien Grall julien.gr...@linaro.org wrote:
Hello Vijay,
On 23/02/15 13:04, Vijay Kilari wrote:
On Thu, Feb 19, 2015 at 7:33 PM, Julien Grall julien.gr...@linaro.org
wrote:
On 19/02/15 07:17, vijay.kil...@gmail.com wrote:
From: Vijaya Kumar K
On Fri, Feb 20, 2015 at 3:44 PM, Ian Campbell ian.campb...@citrix.com wrote:
On Thu, 2015-02-19 at 18:01 +, Julien Grall wrote:
Based on the discussion, what about waiting until someone complain about
GICv3 support on Xen 4.5?
That sounds like a reasonable compromise.
If Xen 4.5 claims
On Fri, Feb 20, 2015 at 4:45 PM, Julien Grall julien.gr...@linaro.org wrote:
On 20/02/15 10:44, Ian Campbell wrote:
On Fri, 2015-02-20 at 15:56 +0530, Vijay Kilari wrote:
On Fri, Feb 20, 2015 at 3:44 PM, Ian Campbell ian.campb...@citrix.com
wrote:
On Thu, 2015-02-19 at 18:01 +, Julien
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
For arm memory for 1024 irq descriptors are allocated
statically irrespective of number of interrupt supported
by the platform.
With this patch, irq descriptors are allocated at run time
and managed using red-black tree. Functions to insert,
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Changes in v2:
- Updated patch 3 commit message
- Updated processor_implementers[] with implementor info
in xen/arch/arm/setup.c
Changes in v1:
- Add support for ThunderX platform
- Add early printk support
- Add psci-0.2 check while
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
ThunderX platform uses pl011 uart.
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
xen/arch/arm/Rules.mk |4
1 file changed, 4 insertions(+)
diff --git a/xen/arch/arm/Rules.mk b/xen/arch/arm/Rules.mk
index
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Add basic support for Cavium ThunderX platform
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
xen/arch/arm/platforms/Makefile |1 +
xen/arch/arm/platforms/thunderx.c | 66 +
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
psci node is generated by xen for dom0.
if the host device tree has psci-0.2 skip parsing this node
and avoid copying from host device tree to dom0 device tree
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
---
In vmap_init, map_pages_to_xen() is called for mapping
vm_bitmap. Initially one page of vm_bitmap is allocated
and mapped using PAGE_HYPERVISOR attribute.
For the rest of vm_bitmap pages, MAP_SMALL_PAGES attribute
is used to map.
In ARM for both PAGE_HYPERVISOR and MAP_SMALL_PAGES, valid bit
is
On Mon, Feb 16, 2015 at 3:58 PM, Julien Grall julien.gr...@linaro.org wrote:
On 16/02/15 10:17, Vijay Kilari wrote:
Hello Vijay,
For ThunderX/arm64 this issue needs to be fixed.
Could you please comment on this?
AFAICS, x86 is also using a 1G area for the vmap. Does it mean that x86
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Changes in v1:
- Add support for ThunderX platform
- Add early printk support
- Add psci-0.2 check while parsing dt node
Vijaya Kumar K (3):
xen/arm: Add ThunderX platform support
xen/arm: Add early printk support for ThunderX platform
Please ignore this series. I have missed to update
processor_implementers[] with cavium in xen/arch/arm/setup.c
Sending v2 version
On Mon, Feb 16, 2015 at 2:36 PM, vijay.kil...@gmail.com wrote:
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Changes in v1:
- Add support for ThunderX
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