Hi Stefano,
> -Original Message-
> From: Stefano Stabellini [mailto:sstabell...@kernel.org]
> Sent: 2017年7月7日 5:05
> To: Wei Chen <wei.c...@arm.com>
> Cc: xen-devel@lists.xen.org; sstabell...@kernel.org; Julien Grall
> <julien.gr...@arm.com>; Steve Capper &l
Hi Stefano,
> -Original Message-
> From: Stefano Stabellini [mailto:sstabell...@kernel.org]
> Sent: 2017年7月7日 4:26
> To: Wei Chen <wei.c...@arm.com>
> Cc: xen-devel@lists.xen.org; sstabell...@kernel.org; Julien Grall
> <julien.gr...@arm.com>; Steve Capper &l
> -Original Message-
> From: Stefano Stabellini [mailto:sstabell...@kernel.org]
> Sent: 2017年7月6日 2:15
> To: Wei Chen <wei.c...@arm.com>
> Cc: Julien Grall <julien.gr...@arm.com>; Stefano Stabellini
> <sstabell...@kernel.org>; Kaly Xin <kaly...
> -Original Message-
> From: Stefano Stabellini [mailto:sstabell...@kernel.org]
> Sent: 2017年7月6日 2:08
> To: Wei Chen <wei.c...@arm.com>
> Cc: Stefano Stabellini <sstabell...@kernel.org>; Kaly Xin <kaly@arm.com>;
> Julien Grall <julien.
> -Original Message-
> From: Stefano Stabellini [mailto:sstabell...@kernel.org]
> Sent: 2017年7月6日 2:02
> To: Wei Chen <wei.c...@arm.com>
> Cc: Stefano Stabellini <sstabell...@kernel.org>; Kaly Xin <kaly@arm.com>;
> Julien Grall <julien.
> -Original Message-
> From: Stefano Stabellini [mailto:sstabell...@kernel.org]
> Sent: 2017年7月6日 1:58
> To: Wei Chen <wei.c...@arm.com>
> Cc: Stefano Stabellini <sstabell...@kernel.org>; xen-devel@lists.xen.org;
> Steve Capper <steve.cap...@arm.com>;
Hi Julien,
> -Original Message-
> From: Julien Grall [mailto:julien.gr...@arm.com]
> Sent: 2017年7月5日 21:08
> To: Wei Chen <wei.c...@arm.com>; Stefano Stabellini <sstabell...@kernel.org>
> Cc: xen-devel@lists.xen.org; Steve Capper <steve.cap...@arm.com>;
Hi Julien,
> -Original Message-
> From: Julien Grall [mailto:julien.gr...@arm.com]
> Sent: 2017年7月4日 23:41
> To: Wei Chen <wei.c...@arm.com>; xen-devel@lists.xen.org
> Cc: sstabell...@kernel.org; Steve Capper <steve.cap...@arm.com>; Kaly Xin
> <ka
Hi Julien,
> -Original Message-
> From: Julien Grall [mailto:julien.gr...@arm.com]
> Sent: 2017年7月4日 15:27
> To: Wei Chen <wei.c...@arm.com>; Stefano Stabellini <sstabell...@kernel.org>
> Cc: xen-devel@lists.xen.org; Steve Capper <steve.cap...@arm.com>;
Hi Stefano,
> -Original Message-
> From: Stefano Stabellini [mailto:sstabell...@kernel.org]
> Sent: 2017年7月4日 7:00
> To: Wei Chen <wei.c...@arm.com>
> Cc: xen-devel@lists.xen.org; sstabell...@kernel.org; Steve Capper
> <steve.cap...@arm.com>; Kaly Xin &l
Hi Stefano,
> -Original Message-
> From: Stefano Stabellini [mailto:sstabell...@kernel.org]
> Sent: 2017年7月4日 6:30
> To: Wei Chen <wei.c...@arm.com>
> Cc: xen-devel@lists.xen.org; sstabell...@kernel.org; Steve Capper
> <steve.cap...@arm.com>; Kaly Xin &l
Hi Stefano,
> -Original Message-
> From: Stefano Stabellini [mailto:sstabell...@kernel.org]
> Sent: 2017年7月4日 6:03
> To: Wei Chen <wei.c...@arm.com>
> Cc: xen-devel@lists.xen.org; sstabell...@kernel.org; Steve Capper
> <steve.cap...@arm.com>; Kaly Xin &l
Hi Stefano,
> -Original Message-
> From: Stefano Stabellini [mailto:sstabell...@kernel.org]
> Sent: 2017年7月4日 5:58
> To: Wei Chen <wei.c...@arm.com>
> Cc: xen-devel@lists.xen.org; sstabell...@kernel.org; Steve Capper
> <steve.cap...@arm.com>; Kaly Xin &l
The legacy IOMMU bindings will be deprecated in future. Instead, device
tree provide generic IOMMU bindings and PCI IOMMU bindings. Currently,
the PCI support hasn't been enabled on ARM Xen. So in this series, we
just add the support of parsing PCI IOMMU bindings.
Wei Chen (2):
xen: devicetree
://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/of/of_pci.c
The commit id is: 987068fcbdb7a085bb11151b91dc6f4c956c4a1b
Signed-off-by: Wei Chen <wei.c...@arm.com>
---
xen/common/device_tree.c | 89 +++
xen/include/xen/device_
This patch is based on Linux of_iommu.c:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/iommu/of_iommu.c
The commit id is:
2a0c57545a291f257cd231b1c4b18285b84608d8
Signed-off-by: Wei Chen <wei.c...@arm.com>
---
xen/drivers/passthrough
we have to detect the binding types while doing SMMU probing.
This detect code is based on Linux ARM SMMUv2 driver:
https://github.com/torvalds/linux/blob/master/drivers/iommu/arm-smmu.c
Signed-off-by: Wei Chen <wei.c...@arm.com>
---
xen/drivers/passthrough/arm/smmu.
.
Signed-off-by: Wei Chen <wei.c...@arm.com>
---
xen/drivers/passthrough/arm/smmu.c | 34 +++---
1 file changed, 23 insertions(+), 11 deletions(-)
diff --git a/xen/drivers/passthrough/arm/smmu.c
b/xen/drivers/passthrough/arm/smmu.c
index 74c09b0..2efa52d
their master devices.
It's better to register SMMU master for generic bindings in add_device
callback. This callback will only be called while constructing Dom0.
Signed-off-by: Wei Chen <wei.c...@arm.com>
---
xen/drivers/passthrough/arm/smmu.c | 144 -
1 file c
preparation for further use. In this case, we can't
call iommu_assign_dt_device.
In previous patch, we have implement the add_device callback for SMMU,
so we can separate this work from assign_device now.
Signed-off-by: Wei Chen <wei.c...@arm.com>
---
xen/drivers/passthrough/device_tree.
protected
devices, regardless of passthrough or not.
Signed-off-by: Wei Chen <wei.c...@arm.com>
---
xen/arch/arm/domain_build.c | 12
1 file changed, 12 insertions(+)
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index c6776d7..6aea427 100644
--- a/xen/ar
It's a error message about XEN_DOMCTL_deassign_device, but the
print message is XEN_DOMCTL_assign_device.
Signed-off-by: Wei Chen <wei.c...@arm.com>
---
xen/drivers/passthrough/device_tree.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/xen/drivers/passt
ron server. The platform device
can be passthrough to guest with both Legacy and Generic IOMMU bindings.
I noticed that Sameer has a iommu_fwspec series in review. It would be nice
to look at it and see if we can re-use it in this series.
Wei Chen (7):
xen/arm: SMMU: Implement the add_device callback in SMMU
legacy master in SMMU probing.
Signed-off-by: Wei Chen <wei.c...@arm.com>
---
xen/drivers/passthrough/arm/smmu.c | 31 +++
1 file changed, 19 insertions(+), 12 deletions(-)
diff --git a/xen/drivers/passthrough/arm/smmu.c
b/xen/drivers/passthrough/arm/smmu.c
So we
want to change the policy to handle data aborts for ARM32:
1. If this data abort is guest generated SError, we will handle this data
abort follow the SError handle option setting.
2. If this data abort is synchronous data abort or Xen generate SError, we
will PANIC the whole system.
Signed-o
Hi Stefano,
On 2017/5/4 5:56, Stefano Stabellini wrote:
> On Wed, 3 May 2017, Wei Chen wrote:
>> ARM32 doesn't have an exception similar to hyp_sync of ARM64 to catch
>> the synchronous data abort (For example, a NULL pointer has been referenced).
>> Hence the SErro
So we
want to change the policy to handle data aborts for ARM32:
1. If this data abort is guest generated SError, we will handle this data
abort follow the SError handle option setting.
2. If this data abort is synchronous data abort or Xen generate SError, we
will PANIC the whole system.
Signed-o
Thanks to you and Julien :)
On 2017/4/6 3:18, Stefano Stabellini wrote:
> Thank you Wei. I committed this series. I fixed on commit patch #16 that
> has 2 asserts.
>
> On Wed, 5 Apr 2017, Wei Chen wrote:
>> From XSA-201, we know that, a guest could trigger SErrors when a
es.
Because we have umasked the Abort/SError bit in previous patch, we have
to disable Abort/SError before doing context switch as we have done for
IRQ.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Reviewed-by: Julien Grall <julien.gr...@arm.com>
Reviewed-by: Stefano Stabellini <ss
The guest generated external data/instruction aborts can be treated
as guest SErrors. We already have a handler to handle the SErrors,
so we can reuse this handler to handle guest external aborts.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Reviewed-by: Stefano Stabellini <sstabell...@k
to restore ELR and CPSR from stack at the same time. We have to use
ldr to restore them separately.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Reviewed-by: Julien Grall <julien.gr...@arm.com>
Reviewed-by: Stefano Stabellini <sstabell...@kernel.org>
---
xen/arch/arm/arm32/asm-offsets.
. We have
to disable the Abort/SError before returning to guest as we have done
for IRQ.
Signed-off-by: Wei Chen <wei.c...@arm.com>
---
xen/arch/arm/traps.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index c092e66..c8163db
SErrors is pointless.
Signed-off-by: Wei Chen <wei.c...@arm.com>
---
v3->v4:
Use one local_abort_is_enabled for ARM32 and ARM64.
---
xen/include/asm-arm/system.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/xen/include/asm-arm/system.h b/xen/include/asm-arm/system.h
inde
compiler reorder our
asm volatile code.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Reviewed-by: Stefano Stabellini <sstabell...@kernel.org>
---
xen/include/asm-arm/processor.h | 13 +
1 file changed, 13 insertions(+)
diff --git a/xen/include/asm-arm/processor.h b/xen/i
.
The ARM32 supports the alternative patching feature. We can use an
ALTERNATIVE to avoid checking option at every trap. We added a new
cpufeature named "SKIP_SYNCHRONIZE_SERROR_ENTRY_EXIT". This feature
will be enabled when the option is not diverse.
Signed-off-by: Wei Chen <wei.c...@arm.
ll avoid all
overhead of the dsb/isb pairs.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Reviewed-by: Stefano Stabellini <sstabell...@kernel.org>
---
docs/misc/xen-command-line.markdown | 44 +
xen/arch/arm/traps.c| 19 +
, that would be a bug.
In the new helpers, we have used the function "inject_vabt_exception"
which was disabled by "#if 0" before. Now, we can remove the "#if 0"
to make this function to be available.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Reviewed-by: Stefan
ult option will be diverse today, this may change in the
future. So we introduce this initcall to guarantee the cpu_hwcaps can be
updated no matter the serror parameter is placed in the command line
or not.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Acked-by: Julien Grall <julien.gr...@arm.com>
We want to add HCR_EL2 register to Xen context switch. And each copy
of HCR_EL2 in vcpu structure will be initialized with the same set
of trap flags as the HCR_EL2 register. We introduce a helper here to
represent these flags to be reused easily.
Signed-off-by: Wei Chen <wei.c...@arm.
DING_VSERROR to SKIP_SYNCHRONIZE_SERROR_ENTRY_EXIT.
2. Add ASSERT in SYNCHRONIZING_SERROR macro to ensure abort is enabled.
3. Use one local_abort_is_enabled for ARM32 and ARM64.
4. Fix some grammer issues.
5. Add Reviewed-by tags from Julien and Stefano for most of this series.
Wei Chen (19):
x
to avoid receiving nested asynchronous abort, we don't
unmask Abort/SError bit in hyp_error and trap_data_abort.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Reviewed-by: Stefano Stabellini <sstabell...@kernel.org>
---
xen/arch/arm/arm32/entry.S | 15 ++-
xen/arch/arm/arm64/
.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Acked-by: Julien Grall <julien.gr...@arm.com>
Reviewed-by: Stefano Stabellini <sstabell...@kernel.org>
---
xen/arch/arm/arm64/domctl.c | 6 ++
xen/arch/arm/domain.c| 5 +
xen/arch/arm/domain_build.c | 7 +++
.
The ARM64 supports the alternative patching feature. We can use an
ALTERNATIVE to avoid checking option at every trap. We added a new
cpufeature named "SKIP_SYNCHRONIZE_SERROR_ENTRY_EXIT". This feature
will be enabled when the option is not diverse.
Signed-off-by: Wei Chen <wei.c...@arm.
abort_guest_exit_start
and abort_guest_exit_end. After we move this macro to a common header,
we need to make sure that the two symbols are visible to other source
files. Currently, they are declared .global in arm32/entry.S, but not
arm64/entry.S. Fix that.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Re
#if 0 to disable it in this patch temporarily to remove the
warning message of unused function from compiler.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Reviewed-by: Stefano Stabellini <sstabell...@kernel.org>
Reviewed-by: Julien Grall <julien.gr...@arm.com>
---
xe
to restore
it to HCR_EL2 when context switch to this guest. This is achieved
by writing saved HCR_EL2 value in guest context back to HCR_EL2
register before return to guest. This had been done by the patch
of "Restore HCR_EL2 register".
Signed-off-by: Wei Chen <wei.c...@arm.com>
Revi
to restore the HCR_EL2 for each vCPU. Of course, the value of each
vCPU's HCR_EL2 should be adjusted to have proper HCR_EL2.RW bit in this
function. In the later patch of this series, we will set the HCR_EL2.RW
for each vCPU while the domain is creating.
Signed-off-by: wei chen <wei.c...@arm.com>
Re
Hi Julien,
On 2017/4/5 16:20, Julien Grall wrote:
On 05/04/2017 09:08, Wei Chen wrote:
Hi Julien,
On 2017/4/5 15:29, Julien Grall wrote:
On 05/04/2017 08:14, Wei Chen wrote:
Because the ASSERT I suggested was wrong, sorry for that. It should
have
been:
ASSERT(!cpus_have_cap(feat
Hi Julien,
On 2017/4/5 15:29, Julien Grall wrote:
On 05/04/2017 08:14, Wei Chen wrote:
Because the ASSERT I suggested was wrong, sorry for that. It should have
been:
ASSERT(!cpus_have_cap(feat) && local_abort_is_enabled());
This is because we want abort enabled when the
On 2017/4/5 15:29, Julien Grall wrote:
On 05/04/2017 08:14, Wei Chen wrote:
Because the ASSERT I suggested was wrong, sorry for that. It should have
been:
ASSERT(!cpus_have_cap(feat) && local_abort_is_enabled());
This is because we want abort enabled when the "feature&qu
On 2017/4/1 2:43, Julien Grall wrote:
Hi Stefano,
On 03/31/2017 07:42 PM, Stefano Stabellini wrote:
On Fri, 31 Mar 2017, Julien Grall wrote:
Hi Wei,
On 31/03/17 14:07, Wei Chen wrote:
If there is a pending SError while we're returning from trap. If the
SError handle option is "DIVERSE
Hi Julien,
On 2017/3/31 22:33, Julien Grall wrote:
Hi Wei,
On 31/03/17 14:07, Wei Chen wrote:
In previous patches, we have provided the ability to synchronize
SErrors in exception entries. But we haven't synchronized SErrors
while returning to guest and doing context switch.
So we still have
Hi Julien,
On 2017/3/31 22:48, Julien Grall wrote:
Hi Wei,
On 31/03/17 14:07, Wei Chen wrote:
In the later patches of this series, we want to use the alternative
patching framework to avoid checking serror_op in every entries.
So we define a new cpu feature "SKIP_CHECK_PENDING_VS
macro to synchronize SErrors while
returning to guest and doing context switch.
We also added a barrier to this macro to prevent compiler reorder our
asm volatile code.
Signed-off-by: Wei Chen <wei.c...@arm.com>
---
v2->v3:
1. Use a macro to replace function to synchronize SErrors.
2.
es.
Because we have umasked the Abort/SError bit in previous patch, we have
to disable Abort/SError before doing context switch as we have done for
IRQ.
Signed-off-by: Wei Chen <wei.c...@arm.com>
---
v2->v3:
1. Use the macro instead of the function to synchronize SErrors.
2. Disable Abor
SErrors is pointless.
Signed-off-by: Wei Chen <wei.c...@arm.com>
---
xen/include/asm-arm/arm32/system.h | 7 +++
xen/include/asm-arm/arm64/system.h | 7 +++
2 files changed, 14 insertions(+)
diff --git a/xen/include/asm-arm/arm32/system.h
b/xen/include/asm-arm/arm32/system.h
index c
The guest generated external data/instruction aborts can be treated
as guest SErrors. We already have a handler to handle the SErrors,
so we can reuse this handler to handle guest external aborts.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Reviewed-by: Stefano Stabellini <sstabell...@k
to avoid receiving nested asynchronous abort, we don't
unmask Abort/SError bit in hyp_error and trap_data_abort.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Reviewed-by: Stefano Stabellini <sstabell...@kernel.org>
---
xen/arch/arm/arm32/entry.S | 15 ++-
xen/arch/arm/arm64/
to disable the Abort/SError before returning to guest as we have done
for IRQ.
Signed-off-by: Wei Chen <wei.c...@arm.com>
---
v2->v3:
1. Use alternative instead of check serror_op to skip sychronizing SErrors
while option is NOT "DIVERSE".
2. Disable Abort/SError before return
ll avoid all
overhead of the dsb/isb pairs.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Reviewed-by: Stefano Stabellini <sstabell...@kernel.org>
---
v2->v3:
1. Replace "entries" to "entries and exits" in commit message and doc.
because all options will take effec
.
The ARM32 supports the alternative patching feature. We can use an
ALTERNATIVE to avoid checking option at every trap. We added a new
cpufeature named "SKIP_CHECK_PENDING_VSERROR". This feature will be
enabled when the option is not diverse.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Rev
abort_guest_exit_start
and abort_guest_exit_end. After we move this macro to a common header,
we need to make sure that the two symbols are visible to other source
files. Currently, they are declared .global in arm32/entry.S, but not
arm64/entry.S. Fix that.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Re
#if 0 to disable it in this patch temporarily to remove the
warning message of unused function from compiler.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Acked-by: Stefano Stabellini <sstabell...@kernel.org>
Reviewed-by: Stefano Stabellini <sstabell...@kernel.org>
---
v2->
, that would be a bug.
In the new helpers, we have used the function "inject_vabt_exception"
which was disabled by "#if 0" before. Now, we can remove the "#if 0"
to make this function to be available.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Reviewed-by: Stefan
, this may change in the
future. So we introduce this initcall to guarantee the cpu_hwcaps can be
updated no matter the serror parameter is placed in the command line
or not.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Acked-by: Julien Grall <julien.gr...@arm.com>
Reviewed-by: Stefan
.
The ARM64 supports the alternative patching feature. We can use an
ALTERNATIVE to avoid checking option at every trap. We added a new
cpufeature named "SKIP_CHECK_PENDING_VSERROR". This feature will be
enabled when the option is not diverse.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Revi
We have introduced two helpers to handle the guest/hyp SErrors:
do_trap_guest_serror and do_trap_guest_hyp_serror. These handlers
can take the role of do_trap_guest_serror and reduce the assembly
code in the same time. So we use these two helpers to replace it
and drop it now.
Signed-off-by: Wei
to restore the HCR_EL2 for each vCPU. Of course, the value of each
vCPU's HCR_EL2 should be adjusted to have proper HCR_EL2.RW bit in this
function. In the later patch of this series, we will set the HCR_EL2.RW
for each vCPU while the domain is creating.
Signed-off-by: wei chen <wei.c...@arm.com>
We want to add HCR_EL2 register to Xen context switch. And each copy
of HCR_EL2 in vcpu structure will be initialized with the same set
of trap flags as the HCR_EL2 register. We introduce a helper here to
represent these flags to be reused easily.
Signed-off-by: Wei Chen <wei.c...@arm.
to restore ELR and CPSR from stack at the same time. We have to use
ldr to restore them separately.
Signed-off-by: Wei Chen <wei.c...@arm.com>
---
Note:
This patch is a bug fix, this bug affects the 4.8 and 4.7 source trees
too.
v2->v3:
1. Add note to the commit message.
2. Read ESR_EL2 value
to restore
it to HCR_EL2 when context switch to this guest. This is achieved
by writing saved HCR_EL2 value in guest context back to HCR_EL2
register before return to guest. This had been done by the patch
of "Restore HCR_EL2 register".
Signed-off-by: Wei Chen <wei.c...@arm.com>
Revi
.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Acked-by: Julien Grall <julien.gr...@arm.com>
Reviewed-by: Stefano Stabellini <sstabell...@kernel.org>
---
xen/arch/arm/arm64/domctl.c | 6 ++
xen/arch/arm/domain.c| 5 +
xen/arch/arm/domain_build.c | 7 +++
in separated patchs.
Wei Chen (19):
xen/arm: Save ESR_EL2 to avoid using mismatched value in syndrome
check
xen/arm: Introduce a helper to get default HCR_EL2 flags
xen/arm: Set and restore HCR_EL2 register for each vCPU separately
xen/arm: Avoid setting/clearing HCR_RW at every context
On 2017/3/31 19:06, Julien Grall wrote:
>
>
> On 31/03/17 11:55, Wei Chen wrote:
>> Hi Julien,
>
> Hi Wei,
>
>> On 2017/3/31 2:38, Julien Grall wrote:
>>>
>>>
>>> On 30/03/17 19:32, Julien Grall wrote:
>>>> On 30/03/17 19:28,
Hi Julien,
On 2017/3/31 2:38, Julien Grall wrote:
>
>
> On 30/03/17 19:32, Julien Grall wrote:
>> On 30/03/17 19:28, Julien Grall wrote:
>>> Hi Wei,
>>>
>>> On 30/03/17 10:13, Wei Chen wrote:
>>>> +void synchronize_serror(void)
>>>
&
On 2017/3/31 16:39, Julien Grall wrote:
> Hi Wei,
>
> On 03/31/2017 03:10 AM, Wei Chen wrote:
>> Hi Julien and Stefano,
>>
>> On 2017/3/31 6:03, Stefano Stabellini wrote:
>>> On Thu, 30 Mar 2017, Julien Grall wrote:
>>>> Hi Wei,
>>>>
&g
he page.h of ARM32 doesn't include alternative.h,
and we don't have the reason to include it to ARM32 page.h now. So we
have to include the alternative.h directly in livepatch.c.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.w...@oracle.com>
---
v3-
On 2017/3/31 6:29, Stefano Stabellini wrote:
> On Thu, 30 Mar 2017, Julien Grall wrote:
>> Hi Wei,
>>
>> On 30/03/17 10:13, Wei Chen wrote:
>>> We will set HCR_EL2 for each domain individually at the place where each
>>> domain is created. vwfi will aff
On 2017/3/31 6:00, Julien Grall wrote:
>
>
> On 30/03/2017 22:49, Stefano Stabellini wrote:
>> On Thu, 30 Mar 2017, Wei Chen wrote:
>>> +/*
>>> + * If the SErrors option is "FORWARD", we have to prevent forwarding
>>> + * serror to
On 2017/3/31 2:38, Julien Grall wrote:
>
>
> On 30/03/17 19:32, Julien Grall wrote:
>> On 30/03/17 19:28, Julien Grall wrote:
>>> Hi Wei,
>>>
>>> On 30/03/17 10:13, Wei Chen wrote:
>>>> +void synchronize_serror(void)
>>>
&
On 2017/3/31 5:36, Stefano Stabellini wrote:
> On Thu, 30 Mar 2017, Wei Chen wrote:
>> We want to move part of SErrors checking code from hyp_error assembly code
>> to a function. This new function will use this macro to distinguish the
>> guest SErrors from hypervisor SError
On 2017/3/31 5:29, Stefano Stabellini wrote:
> On Thu, 30 Mar 2017, Julien Grall wrote:
>> Hi Wei,
>>
>> On 30/03/17 10:13, Wei Chen wrote:
>>> We have provided an option to administrator to determine how to
>>> handle the SErrors. In order to skip the check
Hi Julien,
On 2017/3/31 1:39, Julien Grall wrote:
> Hi Wei,
>
> On 30/03/17 10:13, Wei Chen wrote:
>> In order to distinguish guest-generated SErrors from hypervisor-generated
>> SErrors we have to place SError checking code in every EL1 -> EL2 paths.
>> That will
On 2017/3/31 1:20, Julien Grall wrote:
> Hi Wei,
>
> On 30/03/17 10:13, Wei Chen wrote:
>> When guest triggers async aborts, in most platform, such aborts
>> will be routed to hypervisor. But we don't want the hypervisor
>> to handle such aborts, so we hav
Hi Julien
On 2017/3/30 21:31, Julien Grall wrote:
> Hi Wei,
>
> On 30/03/17 10:13, Wei Chen wrote:
>> Xen will do exception syndrome check while some types of exception
>> take place in EL2. The syndrome check code read the ESR_EL2 register
>> directly, but in some si
Hi Julien,
On 2017/3/30 20:55, Julien Grall wrote:
> Hi Wei,
>
> On 30/03/17 10:02, Wei Chen wrote:
>> +/* Unconditional branch instructions */
>> +/*
>> + * From ARM DDI 0406C.c Section A8.8.25. We can see blx has a H bit.
>> + * In an ARM/Thumb instructions mi
Hi Julien and Stefano,
On 2017/3/31 6:03, Stefano Stabellini wrote:
> On Thu, 30 Mar 2017, Julien Grall wrote:
>> Hi Wei,
>>
>> On 30/03/17 10:13, Wei Chen wrote:
>>> diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
>>> index de59e5f
We have introduced two helpers to handle the guest/hyp SErrors:
do_trap_guest_serror and do_trap_guest_hyp_serror. These handlers
can take the role of do_trap_guest_serror and reduce the assembly
code in the same time. So we use these two helpers to replace it
and drop it now.
Signed-off-by: Wei
to restore
it to HCR_EL2 when context switch to this guest. This is achieved
by writing saved HCR_EL2 value in guest context back to HCR_EL2
register before return to guest. This had been done by the patch
of "Restore HCR_EL2 register".
Signed-off-by: Wei Chen <wei.c...@arm.com>
Revi
.
The ARM64 supports the alternative patching feature. We can use an
ALTERNATIVE to avoid checking option at every trap. We added a new
cpufeature named "SKIP_CHECK_PENDING_VSERROR". This feature will be
enabled when the option is not diverse.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Revi
n to guest.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Reviewed-by: Stefano Stabellini <sstabell...@kernel.org>
---
xen/arch/arm/traps.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index 9b4546e..f3d794e 100644
--- a/xen/arch
.
The ARM32 supports the alternative patching feature. We can use an
ALTERNATIVE to avoid checking option at every trap. We added a new
cpufeature named "SKIP_CHECK_PENDING_VSERROR". This feature will be
enabled when the option is not diverse.
Signed-off-by: Wei Chen <wei.c...@arm.com>
-
abort_guest_exit_start and
abort_guest_exit_end. After we moved this macro to common header, we
should export these two symbols to other source files that will use
VABORT_GEN_BY_GUEST macro. So we change these two symbols to global.
Signed-off-by: Wei Chen <wei.c...@arm.com>
---
v1->v2:
1. Explain
. This would be useful when
VM introspection will gain support of SVC32/64 trapping.
This helper will be used by the later patches in this series, we
use #if 0 to disable it in this patch temporarily to remove the
warning message of unused function from compiler.
Signed-off-by: Wei Chen <wei.c...@arm.
to avoid receiving nested asynchronous abort, we don't
unmask Abort/SError bit in hyp_error and trap_data_abort.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Reviewed-by: Stefano Stabellini <sstabell...@kernel.org>
---
xen/arch/arm/arm32/entry.S | 15 ++-
xen/arch/arm/arm64/
ntroduce this helper to synchronize SErrors while
returning to guest and doing context switch.
This function should be used out of trap.c in later patch of this
series. We have to export this helper in header file.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Reviewed-by: Stefano Stabellini <sstabell
e files.
Signed-off-by: Wei Chen <wei.c...@arm.com>
---
v1->v2:
1. Added a new flag in cpu_hwcaps to avoid using serror_op to skip
synchronizing SError in context switch.
2. Update commit message to explain why we added this cpu_hwcaps.
---
xen/arch/arm/domain.c| 14 +++
The guest generated external data/instruction aborts can be treated
as guest SErrors. We already have a handler to handle the SErrors,
so we can reuse this handler to handle guest external aborts.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Reviewed-by: Stefano Stabellini <sstabell...@k
, that would be a bug.
In the new helpers, we have used the function "inject_vabt_exception"
which was disabled by "#if 0" before. Now, we can remove the "#if 0"
to make this function to be available.
Signed-off-by: Wei Chen <wei.c...@arm.com>
Reviewed-by: Stefan
in separated patchs.
Wei Chen (19):
xen/arm: Save ESR_EL2 to avoid using mismatched value in syndrome
check
xen/arm: Remove vwfi while setting HCR_EL2 in init_traps
xen/arm: Move parse_vwfi from trap.c to domain.c
xen/arm: Restore HCR_EL2 register
xen/arm: Avoid setting/clearing HCR
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