> From: Sergey Dyasli [mailto:sergey.dya...@citrix.com]
> Sent: Wednesday, September 13, 2017 9:01 PM
>
> Under the following circumstances:
>
> 1. L1 doesn't enable PAUSE exiting or PAUSE-loop exiting controls
> 2. L2 executes PAUSE in a loop with RFLAGS.IE == 0
>
> L1's PV IPI through
Under the following circumstances:
1. L1 doesn't enable PAUSE exiting or PAUSE-loop exiting controls
2. L2 executes PAUSE in a loop with RFLAGS.IE == 0
L1's PV IPI through event channel will never reach the target L1's vCPU
which runs L2 because nvmx_intr_intercept() doesn't know about
