Re: [Xen-devel] [PATCH v1 6/8] xen/arm: vgic: Optimize the way to store the target vCPU in the rank

2015-10-01 Thread Ian Campbell
On Wed, 2015-09-30 at 19:11 +0100, Julien Grall wrote: > On 29/09/15 15:23, Ian Campbell wrote: > > On Tue, 2015-09-29 at 14:36 +0100, Julien Grall wrote: > > > On 29/09/15 14:07, Ian Campbell wrote: > > > > On Fri, 2015-09-25 at 15:51 +0100, Julien Grall wrote: > > > > > Xen is currently directly

Re: [Xen-devel] [PATCH v1 6/8] xen/arm: vgic: Optimize the way to store the target vCPU in the rank

2015-09-30 Thread Julien Grall
On 29/09/15 15:23, Ian Campbell wrote: > On Tue, 2015-09-29 at 14:36 +0100, Julien Grall wrote: >> On 29/09/15 14:07, Ian Campbell wrote: >>> On Fri, 2015-09-25 at 15:51 +0100, Julien Grall wrote: Xen is currently directly storing the value of register GICD_ITARGETSR (for GICv2) and

Re: [Xen-devel] [PATCH v1 6/8] xen/arm: vgic: Optimize the way to store the target vCPU in the rank

2015-09-29 Thread Ian Campbell
On Tue, 2015-09-29 at 14:36 +0100, Julien Grall wrote: > On 29/09/15 14:07, Ian Campbell wrote: > > On Fri, 2015-09-25 at 15:51 +0100, Julien Grall wrote: > > > Xen is currently directly storing the value of register > > > GICD_ITARGETSR > > > (for GICv2) and GICD_IROUTER (for GICv3) in the rank. T

Re: [Xen-devel] [PATCH v1 6/8] xen/arm: vgic: Optimize the way to store the target vCPU in the rank

2015-09-29 Thread Julien Grall
On 29/09/15 14:07, Ian Campbell wrote: > On Fri, 2015-09-25 at 15:51 +0100, Julien Grall wrote: >> Xen is currently directly storing the value of register GICD_ITARGETSR >> (for GICv2) and GICD_IROUTER (for GICv3) in the rank. This makes the >> emulation of the registers access very simple but make

Re: [Xen-devel] [PATCH v1 6/8] xen/arm: vgic: Optimize the way to store the target vCPU in the rank

2015-09-29 Thread Ian Campbell
On Fri, 2015-09-25 at 15:51 +0100, Julien Grall wrote: > Xen is currently directly storing the value of register GICD_ITARGETSR > (for GICv2) and GICD_IROUTER (for GICv3) in the rank. This makes the > emulation of the registers access very simple but makes the code to get > the target vCPU for a gi

[Xen-devel] [PATCH v1 6/8] xen/arm: vgic: Optimize the way to store the target vCPU in the rank

2015-09-25 Thread Julien Grall
Xen is currently directly storing the value of register GICD_ITARGETSR (for GICv2) and GICD_IROUTER (for GICv3) in the rank. This makes the emulation of the registers access very simple but makes the code to get the target vCPU for a given IRQ more complex. While the target vCPU of an IRQ is retri

[Xen-devel] [PATCH v1 6/8] xen/arm: vgic: Optimize the way to store the target vCPU in the rank

2015-09-25 Thread Julien Grall
Xen is currently directly storing the value of register GICD_ITARGETSR (for GICv2) and GICD_IROUTER (for GICv3) in the rank. This makes the emulation of the registers access very simple but makes the code to get the target vCPU for a given IRQ more complex. While the target vCPU of an IRQ is retri