>>> On 01.09.17 at 15:50, wrote:
> On Fri, Sep 01, 2017 at 02:46:27PM +0100, Wei Liu wrote:
>> On Fri, Sep 01, 2017 at 03:38:49AM -0600, Jan Beulich wrote:
>> > > + struct cpu_user_regs *regs)
>> > > +{
>> > > +l1_pgentry_t pte;
>> > > +struct
On Fri, Sep 01, 2017 at 02:46:27PM +0100, Wei Liu wrote:
> On Fri, Sep 01, 2017 at 03:38:49AM -0600, Jan Beulich wrote:
> > > /*
> > > * fault handling for read-only MMIO pages
> > > */
> >
> > Note how you move the remains of the function above below this
> >
On Fri, Sep 01, 2017 at 03:38:49AM -0600, Jan Beulich wrote:
> > /*
> > * fault handling for read-only MMIO pages
> > */
>
> Note how you move the remains of the function above below this
> comment, which isn't really correct.
I can place the new function where the
>>> On 31.08.17 at 13:22, wrote:
> --- a/xen/arch/x86/mm.c
> +++ b/xen/arch/x86/mm.c
> @@ -5176,91 +5176,6 @@ static const struct x86_emulate_ops ptwr_emulate_ops =
> {
> .cpuid = pv_emul_cpuid,
> };
>
> -/* Write page fault handler: check if guest is trying to
Provide a unified entry to avoid going through pte look-up, decode and
emulation cycle more than necessary. The path taken is determined by
the faulting address.
Note that the order of checks is changed in the new function, but the
order of the checks is performed shouldn't matter.
The sole