Re: [Xen-devel] [PATCH v2 2/4] arm: smccc: handle SMCs/HVCs according to SMCCC

2017-07-18 Thread Julien Grall
On 30/06/17 16:15, Julien Grall wrote: Now, looking at the documentation for ISS for SMC32 trap (D7-2271 and G6-4957 in ARM DDI 0487B.a), compare to other conditional instruction the ISS has an extra field CCKNOWNPASS (bit 19) to tell you whether CV and COND are valid. But on ARMv7, the ISS

Re: [Xen-devel] [PATCH v2 2/4] arm: smccc: handle SMCs/HVCs according to SMCCC

2017-06-30 Thread Julien Grall
Hi Volodymyr, On 22/06/17 17:24, Volodymyr Babchuk wrote: SMCCC (SMC Call Convention) describes how to handle both HVCs and SMCs. SMCCC states that both HVC and SMC are valid conduits to call to a different firmware functions. Thus, for example PSCI calls can be made both by SMC or HVC. Also

[Xen-devel] [PATCH v2 2/4] arm: smccc: handle SMCs/HVCs according to SMCCC

2017-06-22 Thread Volodymyr Babchuk
SMCCC (SMC Call Convention) describes how to handle both HVCs and SMCs. SMCCC states that both HVC and SMC are valid conduits to call to a different firmware functions. Thus, for example PSCI calls can be made both by SMC or HVC. Also SMCCC defines function number coding for such calls. Besides