>>> On 14.09.15 at 05:27, wrote:
> --- a/xen/arch/x86/psr.c
> +++ b/xen/arch/x86/psr.c
> @@ -21,9 +21,16 @@
>
> #define PSR_CMT(1<<0)
> #define PSR_CAT(1<<1)
> +#define PSR_CDP(1<<2)
>
> struct psr_cat_cbm {
> -uint64_t cbm;
> +union
On Mon, Sep 14, 2015 at 11:27:04AM +0800, He Chen wrote:
> @@ -1165,9 +1165,9 @@ This option can be specified more than once (up to 8
> times at present).
> > `= `
>
> ### psr (Intel)
> -> `= List of ( cmt: | rmid_max: | cat: |
> cos_max: )`
> +> `= List of ( cmt: | rmid_max: | cat: |
>
Add boot parameter `psr=cdp` to enable CDP at boot time.
Intel Code/Data Prioritization(CDP) feature is based on CAT. Note that
cos_max would be half when CDP is on. struct psr_cat_cbm is extended to
support CDP operation. Extend psr_get_cat_l3_info sysctl to get CDP
status.
Signed-off-by: He