According to ARM architecture reference manual (ARM DDI 0487B.a page D7-2259,
ARM DDI 0406C.c page B3-1426), exception with unknown reason (HSR.EC == 0)
has no valid bits in HSR (apart from HSR.EC), so we can't check if that was
caused by conditional instruction. We need to assume that it is unconditional.
Signed-off-by: Volodymyr Babchuk <volodymyr_babc...@epam.com>
Acked-by: Julien Grall <julien.gr...@arm.com>
---
xen/arch/arm/traps.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index c07999b..eae2212 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -1717,7 +1717,7 @@ static int check_conditional_instr(struct cpu_user_regs
*regs,
int cond;
/* Unconditional Exception classes */
- if ( hsr.ec >= 0x10 )
+ if ( hsr.ec == HSR_EC_UNKNOWN || hsr.ec >= 0x10 )
return 1;
/* Check for valid condition in hsr */
--
2.7.4
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