>>> On 14.09.17 at 13:35, wrote:
> On Thu, Sep 14, 2017 at 04:50:10AM -0600, Jan Beulich wrote:
>> >>> On 14.09.17 at 12:42, wrote:
>> > On Thu, Sep 14, 2017 at 04:19:44AM -0600, Jan Beulich wrote:
>> >> >>> On 14.09.17 at 12:08,
On Thu, Sep 14, 2017 at 04:50:10AM -0600, Jan Beulich wrote:
> >>> On 14.09.17 at 12:42, wrote:
> > On Thu, Sep 14, 2017 at 04:19:44AM -0600, Jan Beulich wrote:
> >> >>> On 14.09.17 at 12:08, wrote:
> >> > On Thu, Sep 07, 2017 at 09:29:41AM -0600, Jan
>>> On 14.09.17 at 12:42, wrote:
> On Thu, Sep 14, 2017 at 04:19:44AM -0600, Jan Beulich wrote:
>> >>> On 14.09.17 at 12:08, wrote:
>> > On Thu, Sep 07, 2017 at 09:29:41AM -0600, Jan Beulich wrote:
>> >> >>> On 14.08.17 at 16:28,
On Thu, Sep 14, 2017 at 04:19:44AM -0600, Jan Beulich wrote:
> >>> On 14.09.17 at 12:08, wrote:
> > On Thu, Sep 07, 2017 at 09:29:41AM -0600, Jan Beulich wrote:
> >> >>> On 14.08.17 at 16:28, wrote:
> >> > +int vpci_msi_arch_enable(struct vpci_arch_msi
>>> On 14.09.17 at 12:08, wrote:
> On Thu, Sep 07, 2017 at 09:29:41AM -0600, Jan Beulich wrote:
>> >>> On 14.08.17 at 16:28, wrote:
>> > +int vpci_msi_arch_enable(struct vpci_arch_msi *arch, struct pci_dev *pdev,
>> > + uint64_t
On Thu, Sep 07, 2017 at 09:29:41AM -0600, Jan Beulich wrote:
> >>> On 14.08.17 at 16:28, wrote:
> > +int vpci_msi_arch_enable(struct vpci_arch_msi *arch, struct pci_dev *pdev,
> > + uint64_t address, uint32_t data, unsigned int
> > vectors)
> > +{
>
>>> On 14.08.17 at 16:28, wrote:
> +static unsigned int msi_flags(uint16_t data, uint64_t addr)
> +{
> +unsigned int rh, dm, dest_id, deliv_mode, trig_mode;
> +
> +rh = MASK_EXTR(addr, MSI_ADDR_REDIRECTION_MASK);
> +dm = MASK_EXTR(addr, MSI_ADDR_DESTMODE_MASK);
>
> -Original Message-
> From: Roger Pau Monne [mailto:roger@citrix.com]
> Sent: 14 August 2017 15:29
> To: xen-de...@lists.xenproject.org
> Cc: boris.ostrov...@oracle.com; konrad.w...@oracle.com; Roger Pau Monne
> ; Jan Beulich ; Andrew Cooper
>
Add handlers for the MSI control, address, data and mask fields in
order to detect accesses to them and setup the interrupts as requested
by the guest.
Note that the pending register is not trapped, and the guest can
freely read/write to it.
Signed-off-by: Roger Pau Monné