Re: [Xen-devel] Future support of 5-level paging in Xen

2017-01-03 Thread Boris Ostrovsky
On 01/03/2017 12:32 PM, anshul makkar wrote: > > > On 08/12/16 23:40, Boris Ostrovsky wrote: >> >> >> On 12/08/2016 05:21 PM, Andrew Cooper wrote: >>> On 08/12/2016 19:18, Stefano Stabellini wrote: >> >>> Of course even the largest virtual machine today (2TB on Amazon AFAIK) is not close

Re: [Xen-devel] Future support of 5-level paging in Xen

2017-01-03 Thread anshul makkar
On 08/12/16 23:40, Boris Ostrovsky wrote: On 12/08/2016 05:21 PM, Andrew Cooper wrote: On 08/12/2016 19:18, Stefano Stabellini wrote: Of course even the largest virtual machine today (2TB on Amazon AFAIK) is not close to reaching the current memory limit, but it's just a matter of time.

Re: [Xen-devel] Future support of 5-level paging in Xen

2016-12-09 Thread Jan Beulich
>>> On 09.12.16 at 11:07, wrote: > On 09/12/16 10:59, Jan Beulich wrote: >> Right; a first question though would be whether 5-level support >> would be a build time selection (just like 32-bit PAE was long ago), >> or runtime determined. > > Guessing you mean Linux kernel here: the intention is t

Re: [Xen-devel] Future support of 5-level paging in Xen

2016-12-09 Thread Juergen Gross
On 09/12/16 10:59, Jan Beulich wrote: On 08.12.16 at 18:22, wrote: >> On 08/12/16 16:46, Juergen Gross wrote: >>> The first round of (very preliminary) patches for supporting the new >>> 5-level paging of future Intel x86 processors [1] has been posted to >>> lkml: >>> >>> https://lkml.org/lk

Re: [Xen-devel] Future support of 5-level paging in Xen

2016-12-09 Thread Jan Beulich
>>> On 08.12.16 at 18:22, wrote: > On 08/12/16 16:46, Juergen Gross wrote: >> The first round of (very preliminary) patches for supporting the new >> 5-level paging of future Intel x86 processors [1] has been posted to >> lkml: >> >> https://lkml.org/lkml/2016/12/8/378 >> >> An explicit note has

Re: [Xen-devel] Future support of 5-level paging in Xen

2016-12-09 Thread Jan Beulich
>>> On 09.12.16 at 00:40, wrote: > I've been working (on and off) with SGI to get one of their 32TB boxes > to boot and I don't think that works. We've fixed a couple of bugs but I > don't think Xen can boot with that much memory. We successfully booted > with just under 8TB but couldn't do it

Re: [Xen-devel] Future support of 5-level paging in Xen

2016-12-08 Thread Boris Ostrovsky
On 12/08/2016 07:20 PM, Andrew Cooper wrote: On 08/12/2016 23:40, Boris Ostrovsky wrote: Of course even the largest virtual machine today (2TB on Amazon AFAIK) is not close to reaching the current memory limit, but it's just a matter of time. /me things Oracle will have something to say

Re: [Xen-devel] Future support of 5-level paging in Xen

2016-12-08 Thread Andrew Cooper
On 08/12/2016 23:40, Boris Ostrovsky wrote: > > >> >>> Of course even the largest virtual machine today (2TB on Amazon AFAIK) >>> is not close to reaching the current memory limit, but it's just a >>> matter of time. >> >> /me things Oracle will have something to say about this. I'm sure there >>

Re: [Xen-devel] Future support of 5-level paging in Xen

2016-12-08 Thread Boris Ostrovsky
On 12/08/2016 05:21 PM, Andrew Cooper wrote: On 08/12/2016 19:18, Stefano Stabellini wrote: Of course even the largest virtual machine today (2TB on Amazon AFAIK) is not close to reaching the current memory limit, but it's just a matter of time. /me things Oracle will have something to s

Re: [Xen-devel] Future support of 5-level paging in Xen

2016-12-08 Thread Andrew Cooper
On 08/12/2016 19:18, Stefano Stabellini wrote: > On Thu, 8 Dec 2016, Andrew Cooper wrote: >> On 08/12/16 16:46, Juergen Gross wrote: >>> The first round of (very preliminary) patches for supporting the new >>> 5-level paging of future Intel x86 processors [1] has been posted to >>> lkml: >>> >>> ht

Re: [Xen-devel] Future support of 5-level paging in Xen

2016-12-08 Thread Stefano Stabellini
On Thu, 8 Dec 2016, Andrew Cooper wrote: > On 08/12/16 16:46, Juergen Gross wrote: > > The first round of (very preliminary) patches for supporting the new > > 5-level paging of future Intel x86 processors [1] has been posted to > > lkml: > > > > https://lkml.org/lkml/2016/12/8/378 > > > > An expli

Re: [Xen-devel] Future support of 5-level paging in Xen

2016-12-08 Thread Andrew Cooper
On 08/12/16 16:46, Juergen Gross wrote: > The first round of (very preliminary) patches for supporting the new > 5-level paging of future Intel x86 processors [1] has been posted to > lkml: > > https://lkml.org/lkml/2016/12/8/378 > > An explicit note has been added: "CONFIG_XEN is broken." and > "I

[Xen-devel] Future support of 5-level paging in Xen

2016-12-08 Thread Juergen Gross
The first round of (very preliminary) patches for supporting the new 5-level paging of future Intel x86 processors [1] has been posted to lkml: https://lkml.org/lkml/2016/12/8/378 An explicit note has been added: "CONFIG_XEN is broken." and "I would appreciate help with the code." I think we sho