to differentiate domain_iommu_info and iommu_domain.
Regards,
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-archdata.iommu = xzalloc(struct arm_smmu_xen_device);
+dev-archdata.iommu = xzalloc(struct device_iommu_info);
if (!dev-archdata.iommu)
return -ENOMEM;
}
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On 27/03/15 13:21, Jaggi, Manish wrote:
Regards,
Manish Jaggi
Could you please try to configure you email client correctly? It's
rather confusing the regards, Manish Jaggi at the beginning of the mail.
From: Julien Grall julien.gr...@linaro.org
arm_smmu_domain and arm_smmu_xen_domain, I cannot find it based on
name.
Again, did you read the common above the structure?
How do you different domain_iommu_info vs iommu_domain?
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.
Only one was added for our purpose (arm_smmu_xen_domain). If you don't
like the name of the 2 others, please complain on the Linux ML.
The previous SMMU drivers was diverging from the Linux code and was hard
to backport patch. So my nack is not changed on this point.
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Hi Daniel,
On 31/03/15 18:12, Daniel De Graaf wrote:
On 03/19/2015 03:29 PM, Julien Grall wrote:
This is a follow-up of commit 525ee49 xsm: add device tree labeling
support which add support for device tree labelling in flask.
Those helpers will be use latter when non-pci passthrough (i.e
ERR_PTR(-ENOMEM);
+
+if ( copy_from_guest(tmp, u_buf, size) )
+{
+xfree(tmp);
+return ERR_PTR(-EFAULT);
+}
+tmp[size] = 0;
'\0' please.
Ok.
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be the
testing value here given that cpu_to_core is not yet correctly
implemented on ARM.
It would be nice to at least build test it ARM/ARM64 before pushing
patches which modify common code.
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On 23/03/15 12:37, Vijay Kilari wrote:
On Fri, Mar 20, 2015 at 9:53 PM, Julien Grall julien.gr...@linaro.org wrote:
Hi Vijay,
On 19/03/2015 14:37, vijay.kil...@gmail.com wrote:
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Add ITS support for arm. Following major features
GICR_PIDR2_ARCH_REV_MASK GIC_PIDR2_ARCH_REV_MASK
Why this change? GICD_PIDR2_ARCH_REV_MASK still exists...
gic-v3.c still uses this.
You define GICD_PIDR2_ARCH_REV_MASK with GIC_PIDR2_ARCH_REV_MASK.
So the pre-processor will replace by the correct value.
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think it's a good solution, building Xen ARM take less than 2 minutes
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Hi,
On 23/03/15 13:47, Boris Ostrovsky wrote:
On 03/23/2015 08:42 AM, Julien Grall wrote:
On 19/03/15 21:53, Boris Ostrovsky wrote:
A few patches that add interface for querying hypervisor about device
topology and allow 'xl info -n' display this information if PXM object
is provided by ACPI
);
+unsigned long *its_lpi_alloc_chunks(int nirqs, int *base, int *nr_ids);
+uint32_t its_get_pta_type(void);
+struct its_node * its_get_phys_node(uint32_t dev_id);
#endif /* __ASM_ARM_GIC_ITS_H__ */
/*
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From: Julien Grall julien.gr...@linaro.org
The structure pending_irq is initialized in the same way in 2 different
places. Introduce vgic_init_pending_irq to avoid code duplication.
Also move the setting of the irq field into this function as we need to
initialize it once rather than every time
From: Julien Grall julien.gr...@linaro.org
Currently, Xen is assuming that the virtual IRQ will always be the same
as IRQ.
Modify route_guest_irq to take the virtual IRQ in parameter which allow
Xen to assign a different IRQ number. Also store the vIRQ in the desc
action to easily retrieve
From: Julien Grall julien.gr...@linaro.org
Suggested-by: Jan Beulich jbeul...@suse.com
Signed-off-by: Julien Grall julien.gr...@linaro.org
Acked-by: Ian Campbell ian.campb...@citrix.com
Cc: Ian Jackson ian.jack...@eu.citrix.com
Cc: Keir Fraser k...@xen.org
---
Changes in v5:
- Add
Hello all,
This is the first part of the non-PCI passthrough series. It contains all
patches acked than can go now in Xen upstream.
Another patch series will be sent later in order to fully support non-PCI
passthrough.
Regards,
Julien Grall (14):
xen/arm: Divide GIC initialization in 2 parts
From: Julien Grall julien.gr...@linaro.org
Currently the function to translate IRQ from the device tree is set
unconditionally to be able to be able to retrieve serial/timer IRQ before the
GIC has been initialized.
It assumes that the xlate function won't ever changed. We may also need to
have
From: Julien Grall julien.gr...@linaro.org
When a device is marked for passthrough (via the new property
xen,passthrough), dom0 must not access to the device (i.e not
loading a driver), but should be able to manage the MMIO/interrupt
of the passthrough device.
The latter part will allow
Hi Ian,
On 02/03/2015 17:01, Ian Campbell wrote:
On Mon, 2015-03-02 at 12:56 +, Julien Grall wrote:
From 852f6e3fe49f7fab801f2857b8b505922556d746 Mon Sep 17 00:00:00 2001
From: Ian Campbell ian.campb...@citrix.com
Date: Mon, 2 Mar 2015 11:09:35 +
Subject: [PATCH] xen: arm: Assume
On 02/03/2015 17:04, Ian Campbell wrote:
On Mon, 2015-03-02 at 15:42 +, Julien Grall wrote:
I've just noticed that the support on the previous driver (i.e in
Xen 4.5) may incorrectly expose this feature when all the SMMUs is
not supporting coherent table walk.
I'm
Hi Ian,
On 20/02/2015 17:41, Julien Grall wrote:
+/* Only SPIs are supported */
+if ( virq 32 || virq = vgic_num_irqs(d) )
+return -EINVAL;
+
+p = irq_to_pending(d-vcpu[0], virq);
+if ( !p-desc )
+return -EINVAL;
Are we seeing this pattern a lot? It seems so
= hip04gic_dt_match,
+.init = hip04gic_init,
DT_DEVICE_END
Please keep the same indentation as before.
I was wondering why the indentation is different. Ok
I'm not sure why ... but it looks like we use the same indentation
everywhere for DT_DEVICE_START.
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On 03/03/15 15:07, Frediano Ziglio wrote:
2015-03-03 14:45 GMT+00:00 Julien Grall julien.gr...@linaro.org:
Hello Frediano,
On 03/03/15 11:19, Frediano Ziglio wrote:
This check allow to detect mail interrupt controller even if it does
main
not match one of the standard ones.
This allow
,
DT_DEVICE_END
Please keep the same indentation as before.
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The IRQ 1020 is reserved for special purpose, so the check should be
irq 1020 rather than irq 1021.
Signed-off-by: Julien Grall julien.gr...@linaro.org
---
xen/arch/arm/gic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
index
GICD_TYPER.ITLinesNumber can encode up to 1024 interrupts. Although,
IRQ 1020-1023 are reserved for special purpose.
This helps to check when an IRQ is valid or not.
Signed-off-by: Julien Grall julien.gr...@linaro.org
---
xen/arch/arm/gic-v2.c | 16 ++--
xen/arch/arm/gic-v3.c | 16
the other possibilities (edge falling and level
low) for PPIs.
Sorry I haven't spot those errors until now.
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on this platform.
I will send a patch Monday to fix it.
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Hi Ian,
On 02/03/15 13:17, Ian Campbell wrote:
On Wed, 2015-02-25 at 18:52 +, Julien Grall wrote:
The main goal is to modify as little the Linux code to be able to port
easily new feature added in Linux repo for the driver.
To achieve that we:
- Add helpers to Linux function
https://patches.linaro.org/43012/
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On 02/03/15 13:53, Ian Campbell wrote:
On Mon, 2015-03-02 at 13:48 +, Julien Grall wrote:
Given that, I was wondering if it would be useful to only store
EDGE/LEVEL in the desc-arch.type and, therefore, ignoring
rising/falling and low/high.
If we don't ever need to know about
).
desc-arch.type is only used in Xen for IRQ configuration.
Given that, I was wondering if it would be useful to only store
EDGE/LEVEL in the desc-arch.type and, therefore, ignoring
rising/falling and low/high.
That would make the code simpler.
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] This is actual GICv3 ITS driver from Linux. [..] This helps to
import any issues found in Linux
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Hi Ian,
On 02/03/15 11:12, Ian Campbell wrote:
On Sat, 2015-02-28 at 22:12 +, Julien Grall wrote:
Hi Ian,
On 19/02/2015 15:24, Ian Campbell wrote:
The ICFGR register is not necessarily writeable, in particular it is
IMPLEMENTATION DEFINED for a PPI if the configuration register
prefer to provide a helper function to lookup an
smmu by dev-dev.
I would like to keep the BUG(). Because this would be a mistake to not
find the last SMMU added.
I will move to an helper function.
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triggered).
As high-level interrupt is valid, don't warn on both high-level and
low-level interrupt.
Signed-off-by: Julien Grall julien.gr...@linaro.org
---
The Seattle DT is using high-level interrupt. Also I haven't tried to
boot the latest Xen on it...
---
xen/arch/arm/time.c | 2 +-
1 file changed
coherent table walk. If not, we may need to enable this feature
per-domain.
Signed-off-by: Julien Grall julien.gr...@linaro.org
---
I've just noticed that the support on the previous driver (i.e in
Xen 4.5) may incorrectly expose this feature when all the SMMUs is
not supporting coherent
irq == virq in case of DOM0.
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On 03/03/2015 18:48, Wei Liu wrote:
On Tue, Mar 03, 2015 at 05:46:08PM +, Julien Grall wrote:
On 03/03/15 17:36, Wei Liu wrote:
On Tue, Mar 03, 2015 at 05:22:39PM +, Julien Grall wrote:
Hi,
I've tried to use ./configure on the latest master and got the below error:
checking
...
I've already got a patch for making virq != pirq :
https://patches.linaro.org/43012/
That would drop the static 8K added because of the changes in irq_desc.
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Hello Vijay,
On 4 Mar 2015 06:06, vijay.kil...@gmail.com wrote:
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
ThunderX platform uses pl011 uart.
You need to update docs/misc/arm/early-printk.txt.
Regards,
Signed-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Acked-by: Ian
Hi Ian,
On 05/03/2015 14:43, Ian Campbell wrote:
On Wed, 2015-02-18 at 15:16 +, Julien Grall wrote:
ranges; means there is not translation necessary. But nothing prevent
to have a the property ranges set.
I don't suppose you know of a system where this translation is needed do
you? So
brokenly enables -D_FORTIFY_SOURCE...
./configure: line 7058: python-config: command not found
no
checking for xgettext... /usr/bin/xgettext
Shall we require python-config installed on the build-platform?
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with a virtual GITS_TRANSLATOR address different
from the physical translator address.
FWIW, a 1:1 mapping won't work for guest.
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On 03/03/15 17:36, Wei Liu wrote:
On Tue, Mar 03, 2015 at 05:22:39PM +, Julien Grall wrote:
Hi,
I've tried to use ./configure on the latest master and got the below error:
checking for python-config... no
checking Python.h usability... yes
checking Python.h presence... yes
checking
On 04/03/15 12:35, Ian Campbell wrote:
On Wed, 2015-03-04 at 12:27 +, Julien Grall wrote:
Hi Ian,
On 04/03/15 09:07, Ian Campbell wrote:
On Tue, 2015-03-03 at 19:41 +, Julien Grall wrote:
python-dev is not installed. Although I have libpython-dev installed.
And this used to work I
.
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Hi Ian,
On 03/03/2015 10:27, Ian Campbell wrote:
On Tue, 2015-03-03 at 13:28 +0530, Vijay Kilari wrote:
On Tue, Feb 24, 2015 at 6:29 PM, Julien Grall julien.gr...@linaro.org wrote:
On 24/02/15 10:26, Ian Campbell wrote:
On Tue, 2015-02-24 at 09:38 +, Julien Grall wrote:
Hi Ian,
On 24
Hello Vijay,
On 03/03/2015 03:55, Vijay Kilari wrote:
On Mon, Mar 2, 2015 at 6:49 PM, Julien Grall julien.gr...@linaro.org wrote:
On 02/03/15 12:30, vijay.kil...@gmail.com wrote:
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Add ITS support for arm. Following major features
WRITEALLOC will never be set.
I think it would be better to have a separate helper (as you suggested
on a previous mail).
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mail, I would prefer to introduce a new
callback to check if the node is a GIC.
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the hypercall pci_device_add is called?
What about ACPI case? Does everything necessary live in static table?
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upstream ( 3.19)... They reworked a big part of
the code (mostly P2M handling) in this version.
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On 23/02/15 11:50, Manish Jaggi wrote:
On 23/02/15 4:44 pm, Julien Grall wrote:
On 23/02/2015 10:59, Manish Jaggi wrote:
On 20/02/15 8:09 pm, Ian Campbell wrote:
On Fri, 2015-02-20 at 19:44 +0530, Manish Jaggi wrote:
Another option might be a new hypercall (assuming one doesn't already
Hi Ian,
On 23/02/15 15:20, Ian Campbell wrote:
On Fri, 2015-02-20 at 17:28 +, Julien Grall wrote:
The priority is controlled by route_irq_to_guest and set statically
using GIC_PRI_IRQ.
If we decide to hardcoded the priority here, we should drop the
parameter on gic_route_irq_guest
Hi Ian,
On 23/02/15 15:12, Ian Campbell wrote:
On Fri, 2015-02-20 at 17:01 +, Julien Grall wrote:
diff --git a/docs/misc/arm/device-tree/passthrough.txt
b/docs/misc/arm/device-tree/passthrough.txt
new file mode 100644
index 000..04645b3
--- /dev/null
+++ b/docs/misc/arm/device
On 23/02/15 15:15, Ian Campbell wrote:
On Fri, 2015-02-20 at 17:03 +, Julien Grall wrote:
On 20/02/15 15:42, Ian Campbell wrote:
On Tue, 2015-01-13 at 14:25 +, Julien Grall wrote:
@@ -919,8 +943,14 @@ static int make_timer_node(const struct domain *d,
void *fdt,
return res
Hi Ian,
On 23/02/15 15:22, Ian Campbell wrote:
On Fri, 2015-02-20 at 17:29 +, Julien Grall wrote:
On 20/02/15 16:08, Ian Campbell wrote:
On Wed, 2015-01-28 at 18:26 +, Stefano Stabellini wrote:
+int spi = irq - 32;
unsigned int
and underflow?
No because there is a check
Hello Vijay,
On 23/02/15 13:04, Vijay Kilari wrote:
On Thu, Feb 19, 2015 at 7:33 PM, Julien Grall julien.gr...@linaro.org wrote:
On 19/02/15 07:17, vijay.kil...@gmail.com wrote:
From: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
For arm memory for 1024 irq descriptors are allocated
passthrough).
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.
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Hi Ian,
On 23/02/15 15:31, Ian Campbell wrote:
On Fri, 2015-02-20 at 17:45 +, Julien Grall wrote:
On 20/02/15 16:58, Ian Campbell wrote:
On Tue, 2015-01-13 at 14:25 +, Julien Grall wrote:
This new function will correctly initialize the IOMMU page table for the
current domain.
Also
On 23/02/15 16:04, Ian Campbell wrote:
On Mon, 2015-02-23 at 15:53 +, Julien Grall wrote:
Hi Ian,
On 23/02/15 15:28, Ian Campbell wrote:
On Mon, 2015-02-23 at 09:33 +, Jan Beulich wrote:
On 20.02.15 at 17:53, ian.campb...@citrix.com wrote:
Jan, do you have any feeling for how
On 23/02/15 16:09, Vijay Kilari wrote:
On Mon, Feb 23, 2015 at 9:10 PM, Julien Grall julien.gr...@linaro.org wrote:
Hello Vijay,
On 23/02/15 13:04, Vijay Kilari wrote:
On Thu, Feb 19, 2015 at 7:33 PM, Julien Grall julien.gr...@linaro.org
wrote:
On 19/02/15 07:17, vijay.kil...@gmail.com
Hi Ian,
On 20/02/15 16:55, Ian Campbell wrote:
On Tue, 2015-01-13 at 14:25 +, Julien Grall wrote:
There is no reason to use signed integer for an index.
Did you check for now pointless if ( uthing 0 ) which a picky
compiler might whinge about?
I just checked and we don't have
Hi Ian,
On 23/02/15 15:30, Ian Campbell wrote:
On Tue, 2015-01-13 at 14:25 +, Julien Grall wrote:
+/* This limit is used by the hypercalls to restrict the size of the path */
+#define DEVICE_TREE_MAX_PATHLEN 1024
Is this something you've made up or derived from the DT spec/ePAPR etc
On 23/02/15 15:52, Ian Campbell wrote:
On Mon, 2015-02-23 at 15:47 +, Julien Grall wrote:
Hi Ian,
On 23/02/15 15:20, Ian Campbell wrote:
On Fri, 2015-02-20 at 17:28 +, Julien Grall wrote:
The priority is controlled by route_irq_to_guest and set statically
using GIC_PRI_IRQ.
If we
Hi Ian,
On 23/02/2015 14:45, Ian Campbell wrote:
+is the absolute path in the device tree.
Can it be an alias?
Right now, no. But I can change it if you think it's useful.
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-off-by: Vijaya Kumar K vijaya.ku...@caviumnetworks.com
Acked-by: Ian Campbell ian.campb...@citrix.com
Seems like a candidate for backport to 4.5.
I think so.
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On 25/02/15 14:32, Ian Campbell wrote:
On Thu, 2015-02-19 at 15:13 +, Ian Campbell wrote:
On Thu, 2015-02-19 at 14:42 +, Julien Grall wrote:
Although, I think the debug message in bad_trap is useful to keep. It
may be handy to have the HSR and the guest stack trace printed if Xen
,
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On 25/02/15 16:34, Will Deacon wrote:
On Wed, Feb 25, 2015 at 04:22:33PM +, Julien Grall wrote:
Hello,
Ping? Any comments from ARM's maintainers on theses patches (at least #2)?
I couldn't care less :)
The arm64 part is boring in the good sense of the word.
I will still need a ack
Hello,
Ping? Any comments from ARM's maintainers on theses patches (at least #2)?
Regards,
On 18/02/15 13:51, Julien Grall wrote:
Hello,
This small patch series moves the detection of running on Xen earlier. This is
required in order to support earlyprintk via Xen and selecting preferred
Based on commit e6b5be2be4e30037eb551e0ed09dd97bd00d85d3.
It's a verbatim of the Linux SMMU drivers code. No Xen code has yet been added
and the file is not built.
Compare to the previous drivers it gains support of PCI. Though it will
need a bit of plumbing for Xen.
Signed-off-by: Julien Grall
a new field
for this place.
Signed-off-by: Julien Grall julien.gr...@linaro.org
Acked-by: Jan Beulich jbeul...@suse.com
Acked-by: Stefano Stabellini stefano.stabell...@eu.citrix.com
CC: Keir Fraser k...@xen.org
CC: Andrew Cooper andrew.coop...@citrix.com
---
Changes in v4:
- Add Jan
of the former.
Signed-off-by: Julien Grall julien.gr...@linaro.org
Acked-by: Jan Beulich jbeul...@suse.com
Acked-by: Stefano Stabellini stefano.stabell...@eu.citrix.com\
Acked-by: Ian Campbell ian.campb...@citrix.com
---
Changes in v4:
- Add Ian's ack
Changes in v3:
- Add
summarized below the patch acked/modified:
A: Patch acked
M: Patch modified in this version
Sincerely yours,
Julien Grall (8):
xen/iommu: arm: Remove temporary the SMMU driver
xen/arm: Introduce a generic way to describe device
xen/iommu: Consolidate device assignment ops into a single
the exisiting compatible field and replace with a dt_match field
Signed-off-by: Julien Grall julien.gr...@linaro.org
Acked-by: Stefano Stabellini stefano.stabell...@eu.citrix.com
Acked-by: Ian Campbell ian.campb...@citrix.com
---
Changes in v4:
- s/dt_match_node/dt_device_match/ in the commit
The current SMMU driver has completly diverged. That makes me hard to
maintain.
Signed-off-by: Julien Grall julien.gr...@linaro.org
Acked-by: Stefano Stabellini stefano.stabell...@eu.citrix.com
Acked-by: Ian Campbell ian.campb...@citrix.com
---
Currently none of the platform used on OSStest
coherent table walk. If not, we may need to enable this feature
per-domain.
Signed-off-by: Julien Grall julien.gr...@linaro.org
---
I've just noticed that the support on the previous driver (i.e in
Xen 4.5) may incorrectly expose this feature when all the SMMUs is
not supporting coherent
Basic changes to support SMMUs which protect the network cards. The one
for the SATA is more complicate to support because it requires to
support stream ID matching.
Signed-off-by: Julien Grall julien.gr...@linaro.org
---
xen/drivers/passthrough/arm/smmu.c | 32
when required the code which comes from Linux. If so a
comment has been added with /* Xen: ... */ explaining why it's
necessary.
The support for PCI has been commented because it's not yet supported by
Xen ARM and therefore won't compile.
Signed-off-by: Julien Grall julien.gr...@linaro.org
Hi Ian,
On 20/02/15 15:15, Ian Campbell wrote:
On Tue, 2015-01-13 at 14:25 +, Julien Grall wrote:
On ARM the virtual GIC may differ between each guest (emulated GIC version,
number of SPIs...). Those informations are already known at the domain
creation
This information is already
for dom0.
I think xen can enforce the ABI while creating device tree
While it's true for Linux, you can't assume that another OS (such as
FreeBSD) will parse the device tree in the same order.
Regards,
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-by: Julien Grall julien.gr...@linaro.org
---
https://bugs.launchpad.net/ubuntu/+source/mawk/+bug/1159933
This bug impacts every version of Xen built on Debian Jessie when XSM is
enabled.
It would be interesting to backport it.
---
xen/xsm/flask/policy/mkaccess_vector.sh | 6 +++---
1 file changed, 3
On 20/02/2015 17:04, Ian Campbell wrote:
On Tue, 2015-01-13 at 14:25 +, Julien Grall wrote:
Currently, when the device is deassigned from a domain, we directly reassign
to DOM0.
As the device may not have been correctly reset, this may lead to corruption or
expose some part of DOM0
been nice add a link to the discussion [1]. It would
have avoid us to get back on the archives to find the reason of this patch.
Regards,
[1] http://lists.xen.org/archives/html/xen-devel/2014-11/msg00507.html
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been nice add a link to the discussion [1]. It would
have avoid us to get back on the archives to find the reason of this patch.
Regards,
[1] http://lists.xen.org/archives/html/xen-devel/2014-11/msg00507.html
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Hi Ian,
On 20/02/15 12:22, Ian Campbell wrote:
On Fri, 2015-01-30 at 18:49 +, Julien Grall wrote:
@@ -2,8 +2,34 @@
#define __ASM_ARM_DEVICE_H
#include xen/init.h
+
+enum device_type
+{
+DEV_DT,
I suppose no #ifdef here because an empty enum is a bit silly?
this code
On 24/02/15 16:01, Ian Campbell wrote:
On Mon, 2015-02-23 at 16:30 +, Julien Grall wrote:
I'm wondering if it's worth to backport this patch to Xen 4.5?
Maybe, I doubt 4.5 is being used on platforms which suffer from this
issue, but it's pretty un-intrusive I suppose.
There is no reason
done
here.
Agreed. Just it doesn't make sense to backport new GICv3 patches as we
know that without the previous series any Linux = 3.19 won't boot at all.
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http
-
unstable.git;a=commit;h=7ba87910e557b06c589c3c0fbc6757fa664d029e
Regards,
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Julien Grall
Please quote the correct part when you answer.
Is this patch in staging?
Not yet. But we should avoid to introduce more mess in the headers.
Regards,
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Julien Grall
irq routing to guest.
The IRQ injection should not consider a 1:1 mapping between pIRQ and vIRQ.
I have a patch which allow virq != pirq:
https://patches.linaro.org/43012/
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miss at least one change in the
copied
GICv2 driver.
Regards,
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Julien Grall
I think you are referring to changes in staging, right ?
Yes. If you already start to diverge from staging that's not good.
We may have some patches reaching upstream before this series. You have
to keep up-date
this will help to sort out a good approach for both ARM and x86.
Regards,
[1] http://lists.xen.org/archives/html/xen-devel/2014-11/msg00522.html
[2] http://lists.xen.org/archives/html/xen-devel/2015-01/msg01184.html
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driver.
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that all falls out from the proper tracking of the
vdev_id to pdev_id and from vits to pits for a given domain and the
management/tracking of the struct pci_dev.
I think this is the right way to go. Though I haven't read the ITS spec
closely.
Regards,
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Julien Grall
the commit [1] in your branch.
[1]
http://xenbits.xen.org/gitweb/?p=people/julieng/xen-unstable.git;a=commit;h=7ba87910e557b06c589c3c0fbc6757fa664d029e
Regards,
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