On Wed, Feb 1, 2017 at 9:14 PM, Andy Lutomirski <l...@kernel.org> wrote:
> On Thu, Jan 26, 2017 at 8:59 AM, Thomas Garnier <thgar...@google.com> wrote:
>> This patch makes the GDT remapped pages read-only to prevent corruption.
>> This change is done only on 64 bit.
&g
address does not provide enough space for the kernel
to support a large number of processors.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
Based on next-20170125
---
arch/x86/include/asm/fixmap.h | 8
arch/x86/include/asm/pgtable_64_types.h | 3 ---
arch/x86/
the original GDT.
Instead of reloading the previous GDT, VMX will reload the fixmap GDT as
expected. For testing, VMs were started and restored on multiple
configurations.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
Based on next-20170125
---
arch/x86/include/asm/desc.h
. For hibernation, the main processor returns with the
original GDT and switches back to the remapping at completion.
This patch was tested on both architectures. Hibernation and KVM were
both tested specially for their usage of the GDT.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
On Thu, Jan 26, 2017 at 10:52 AM, Andy Lutomirski <l...@amacapital.net> wrote:
> On Thu, Jan 26, 2017 at 8:59 AM, Thomas Garnier <thgar...@google.com> wrote:
>> Each processor holds a GDT in its per-cpu structure. The sgdt
>> instruction gives the base address of the cu
On Mon, Feb 20, 2017 at 8:56 AM, Andy Lutomirski <l...@amacapital.net> wrote:
> On Fri, Feb 17, 2017 at 2:01 PM, Thomas Garnier <thgar...@google.com> wrote:
>> On Fri, Feb 17, 2017 at 1:00 PM, Jim Mattson <jmatt...@google.com> wrote:
>>> On Fri, Feb 17, 201
On Mon, Feb 20, 2017 at 9:28 AM, Thomas Garnier <thgar...@google.com> wrote:
> On Mon, Feb 20, 2017 at 8:56 AM, Andy Lutomirski <l...@amacapital.net> wrote:
>> On Fri, Feb 17, 2017 at 2:01 PM, Thomas Garnier <thgar...@google.com> wrote:
>>> On Fri, Feb 17,
address does not provide enough space for the kernel
to support a large number of processors.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
Based on next-20170213
Fixed fixmap dependencies on random configurations.
---
Documentation/x86/x86_64/mm.txt | 5 -
arch/x86/inclu
On Fri, Feb 17, 2017 at 1:00 PM, Jim Mattson <jmatt...@google.com> wrote:
> On Fri, Feb 17, 2017 at 12:11 PM, Thomas Garnier <thgar...@google.com> wrote:
>> On Fri, Feb 17, 2017 at 9:49 AM, Jim Mattson <jmatt...@google.com> wrote:
>>>
>>> Can
6/core kvm/linux-next tip/auto-latest v4.9-rc8
> v4.9-rc7 v4.9-rc6]
> [if your patch is applied to the wrong git tree, please drop us a note to
> help improve the system]
>
> url:https://github.com/0day-ci/linux/commits/Thomas-Garnier/
> x86-mm-Adapt-MODULES_END-based-on-Fixma
y GDT but I think doesn't matter one or the
other here. We have to check specific types for LDT or TSS, other
values describe other entries (cf Intel volume 3, 3.5) (for example 14
& 15 on 64-bits are for trap & interrupt gates).
>
>
> On Tue, Feb 14, 2017 at 11:42 AM, Thomas
the original GDT.
Instead of reloading the previous GDT, VMX will reload the fixmap GDT as
expected. For testing, VMs were started and restored on multiple
configurations.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
Based on next-20170213
---
arch/x86/include/asm/desc.h
the original GDT.
Instead of reloading the previous GDT, VMX will reload the fixmap GDT as
expected. For testing, VMs were started and restored on multiple
configurations.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
Based on next-20170213
---
arch/x86/include/asm/desc.h
address does not provide enough space for the kernel
to support a large number of processors.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
Based on next-20170213
---
arch/x86/include/asm/fixmap.h | 8
arch/x86/include/asm/pgtable_64_types.h | 3 ---
arch/x86/
. For hibernation, the main processor returns with the
original GDT and switches back to the remapping at completion.
This patch was tested on both architectures. Hibernation and KVM were
both tested specially for their usage of the GDT.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
The KVM segment_base function is confusing. This patch replaces integers
with appropriate flags, simplify constructs and add comments.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
Based on next-20170213
---
arch/x86/kvm/vmx.c | 26 ++
1 file chang
On Tue, Feb 14, 2017 at 7:57 PM, Andy Lutomirski <l...@amacapital.net> wrote:
> On Tue, Feb 14, 2017 at 11:42 AM, Thomas Garnier <thgar...@google.com> wrote:
>> The KVM segment_base function is confusing. This patch replaces integers
>> with appropriate flags, simplify
On Wed, Feb 15, 2017 at 5:58 AM, Borislav Petkov <b...@suse.de> wrote:
>
> On Tue, Feb 14, 2017 at 11:42:56AM -0800, Thomas Garnier wrote:
> > This patch aligns MODULES_END to the beginning of the Fixmap section.
> > It optimizes the space available for both sections
On Wed, Feb 15, 2017 at 7:37 AM, Boris Ostrovsky
<boris.ostrov...@oracle.com> wrote:
> On 02/14/2017 02:42 PM, Thomas Garnier wrote:
>> diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c
>> index 0dee6f59ea82..6399bab936cd 100644
>> --- a/arch/x86/xen/smp.c
address does not provide enough space for the kernel
to support a large number of processors.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
Based on next-20170213
---
Documentation/x86/x86_64/mm.txt | 5 -
arch/x86/include/asm/pgtable_64_types.h | 3 ++-
2 files chan
. For hibernation, the main processor returns with the
original GDT and switches back to the remapping at completion.
This patch was tested on both architectures. Hibernation and KVM were
both tested specially for their usage of the GDT.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
The KVM segment_base function is confusing. This patch replaces integers
with appropriate flags, simplify constructs and add comments.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
Based on next-20170213
---
arch/x86/kvm/vmx.c | 30 --
1 file chang
l
to support a large number of processors.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
Based on next-20170308
---
Documentation/x86/x86_64/mm.txt | 5 -
arch/x86/include/asm/pgtable_64.h | 1 +
arch/x86/include/asm/pgtable_64_types.h | 3 ++-
3 files changed, 7 insertio
On Tue, Mar 14, 2017 at 2:04 PM, Pavel Machek <pa...@ucw.cz> wrote:
> On Tue 2017-03-14 10:05:08, Thomas Garnier wrote:
>> This patch makes the GDT remapped pages read-only to prevent corruption.
>> This change is done only on 64-bit.
>>
>> The native_load_tr_desc
On Thu, Mar 9, 2017 at 1:46 PM, Andy Lutomirski <l...@amacapital.net> wrote:
> On Thu, Mar 9, 2017 at 1:43 PM, Andrew Cooper <andrew.coop...@citrix.com>
> wrote:
>> On 09/03/2017 21:32, Andy Lutomirski wrote:
>>> On Mon, Mar 6, 2017 at 2:03 PM, Thomas Ga
On Thu, Mar 9, 2017 at 2:13 PM, Boris Ostrovsky
wrote:
>
>>> I don't have any experience with Xen so it would be great if virtme can
>>> test it.
>>
>> I am pretty sure I tested this series at some point but I'll test it again.
>>
>
>
> Fails 32-bit build:
>
>
>
On Mon, Mar 13, 2017 at 6:09 AM, Boris Ostrovsky
wrote:
> On 03/11/2017 08:06 AM, Andrew Cooper wrote:
>> On 11/03/2017 03:58, Boris Ostrovsky wrote:
>>> On 03/10/2017 09:39 PM, Boris Ostrovsky wrote:
I am looking into GDT remap series [0] which crashes PV guests
On Mon, Mar 13, 2017 at 10:32 AM, Boris Ostrovsky
wrote:
> No, it will need a few small changes. I am actually finishing the test
> run (in the next hour or so) and will reply on the Linux thread.
>
Great, thanks again!
--
Thomas
On Mon, Mar 13, 2017 at 11:32 AM, Boris Ostrovsky
wrote:
> There are a couple of problems for Xen PV guests that need to be addressed:
> 1. Xen's set_fixmap op needs non-default handling for
> FIX_GDT_REMAP_BEGIN range
> 2. GDT remapping for PV guests needs to be RO
com> for testing and
recommending changes for Xen support.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
Based on next-20170308
---
arch/x86/entry/vdso/vma.c | 2 +-
arch/x86/include/asm/desc.h | 58 ---
arch/x86/include/
the original GDT.
Instead of reloading the previous GDT, VMX will reload the fixmap GDT as
expected. For testing, VMs were started and restored on multiple
configurations.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
Based on next-20170308
---
arch/x86/include/asm/desc.h
address does not provide enough space for the kernel
to support a large number of processors.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
Based on next-20170308
---
Documentation/x86/x86_64/mm.txt | 5 -
arch/x86/include/asm/pgtable_64_types.h | 3 ++-
arch/x86/kernel/mo
the original GDT.
Instead of reloading the previous GDT, VMX will reload the fixmap GDT as
expected. For testing, VMs were started and restored on multiple
configurations.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
Based on next-20170306
---
arch/x86/include/asm/desc.h
. For hibernation, the main processor returns with the
original GDT and switches back to the remapping at completion.
This patch was tested on both architectures. Hibernation and KVM were
both tested specially for their usage of the GDT.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
address does not provide enough space for the kernel
to support a large number of processors.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
Based on next-20170306
---
Documentation/x86/x86_64/mm.txt | 5 -
arch/x86/include/asm/pgtable_64_types.h | 3 ++-
arch/x86/kernel/mo
On Tue, Aug 15, 2017 at 12:56 AM, Ingo Molnar <mi...@kernel.org> wrote:
>
> * Thomas Garnier <thgar...@google.com> wrote:
>
>> > Do these changes get us closer to being able to build the kernel as truly
>> > position independent, i.e. to place it anywhere
On Tue, Aug 15, 2017 at 7:47 AM, Daniel Micay <danielmi...@gmail.com> wrote:
> On 15 August 2017 at 10:20, Thomas Garnier <thgar...@google.com> wrote:
>> On Tue, Aug 15, 2017 at 12:56 AM, Ingo Molnar <mi...@kernel.org> wrote:
>>>
>>> * Thomas Garni
Change the assembly code to use only relative references of symbols for the
kernel to be PIE compatible.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
as expected.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/kernel/head_64.S | 31 +++
1 file changed, 23 insertions
Add a new _ASM_GET_PTR macro to fetch a symbol address. It will be used
to replace "_ASM_MOV $, %dst" code construct that are not compatible
with PIE.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/include/asm/asm.h | 13 +
1 file changed, 13 ins
three PUD pages.
The relocation table uses 64-bit integers generated with the updated
relocation tool with the large-reloc option.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/Kconfig | 21 +
arch/x86/boot/compressed/Makefile
memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/kernel/head64.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index 925b2928f377..e71f27a20576 100644
--- a/arch/x86/kernel/he
Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/tools/relocs.c | 74 +++--
1 file changed, 65 insertions(+), 9 deletions(-)
)
.text sections:
- PIE disabled: 9373572 bytes (+0.04% from baseline)
- PIE enabled: 9499138 bytes (+1.38% from baseline)
The big decrease in vmlinux file size is due to the lower number of
relocations appended to the file.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
ar
if PIE is enabled, switch the paravirt assembly constraints to be
compatible. The %c/i constrains generate smaller code so is kept by
default.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas
Change the assembly code to use only relative references of symbols for the
kernel to be PIE compatible.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
Change the assembly code to use only relative references of symbols for the
kernel to be PIE compatible.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
Change the assembly code to use only relative references of symbols for the
kernel to be PIE compatible.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/entry/entry_64.S | 4 ++--
arch/x86/include/asm/percpu.h | 25 +++--
arch/x86/kernel/cpu/common.c
still expect kernel functions to be within
2G and generate relative calls. To solve this issue, the PLT arm64 code
was adapted for x86_64. When a relative relocation go outside its range,
a dynamic PLT entry is used to correctly jump to the destination.
Signed-off-by: Thomas Garnier <th
Change the assembly code to use only relative references of symbols for the
kernel to be PIE compatible.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
Provide an option to default visibility to hidden except for key
symbols. This option is disabled by default and will be used by x86_64
PIE support to remove errors between compilation units.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/boot/boot.h | 2 +-
ar
the top 2G and 32-bit
integers are not enough.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/tools/relocs.c| 60 +-
arch/x86/tools/relocs.h| 4 +--
arch/x86/tools/relocs_common.c | 15 +++
3 files changed, 60 inse
Changes:
- v2:
- Add support for global stack cookie while compiler default to fs without
mcmodel=kernel
- Change patch 7 to correctly jump out of the identity mapping on kexec load
preserve.
These patches make the changes necessary to build the kernel as Position
Independent
randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/include/asm/kvm_host.h | 6 --
arch/x86/kernel/kvm.c | 6 --
arch/x86/kvm/svm.c | 4 ++--
3 files changed, 10 insertions(+), 6 deletions(-)
diff
range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/xen/xen-asm.h | 3 ++-
arch/x86/xen/xen-head.S | 9 +
2 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/arch/x86/xen/xen-asm.h b/arch/x86/xen/xen-asm.h
index 465276
Replace the %c constraint with %P. The %c is incompatible with PIE
because it implies an immediate value whereas %P reference a symbol.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier
.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/Kconfig | 4
arch/x86/Makefile | 9 +
arch/x86/entry/entry_32.S | 3 ++-
arch/x86/entry/entry_64.S | 3 ++-
arch/x86/include/asm/proce
Change assembly to use the new _ASM_GET_PTR macro instead of _ASM_MOV for
the assembly to be PIE compatible.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.
Replace the %c constraint with %P. The %c is incompatible with PIE
because it implies an immediate value whereas %P reference a symbol.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier
randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/include/asm/processor.h | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index c13527
On Fri, Aug 11, 2017 at 5:41 AM, Ingo Molnar <mi...@kernel.org> wrote:
>
> * Thomas Garnier <thgar...@google.com> wrote:
>
>> Changes:
>> - v2:
>>- Add support for global stack cookie while compiler default to fs without
>> mcmodel=kernel
On Fri, Aug 11, 2017 at 5:36 AM, Pavel Machek <pa...@ucw.cz> wrote:
> On Thu 2017-08-10 10:26:05, Thomas Garnier wrote:
>> Change the assembly code to use only relative references of symbols for the
>> kernel to be PIE compatible.
>>
>> Position Independent Ex
On Wed, Jul 19, 2017 at 4:33 PM, H. Peter Anvin <h...@zytor.com> wrote:
> On 07/19/17 11:26, Thomas Garnier wrote:
>> On Tue, Jul 18, 2017 at 8:08 PM, Brian Gerst <brge...@gmail.com> wrote:
>>> On Tue, Jul 18, 2017 at 6:33 PM, Thomas Garnier <thgar...@google.com&
Change the assembly code to use only relative references of symbols for the
kernel to be PIE compatible.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
Replace the %c constraint with %P. The %c is incompatible with PIE
because it implies an immediate value whereas %P reference a symbol.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier
as expected.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/kernel/head_64.S | 32
1 file changed, 24 insertions
Change assembly to use the new _ASM_GET_PTR macro instead of _ASM_MOV for
the assembly to be PIE compatible.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.
Change the assembly code to use only relative references of symbols for the
kernel to be PIE compatible.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
These patches make the changes necessary to build the kernel as Position
Independent Executable (PIE) on x86_64. A PIE kernel can be relocated below
the top 2G of the virtual address space. It allows to optionally extend the
KASLR randomization range from 1G to 3G.
Thanks a lot to Ard Biesheuvel
if PIE is enabled, switch the paravirt assembly constraints to be
compatible. The %c/i constrains generate smaller code so is kept by
default.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas
Change the assembly code to use only relative references of symbols for the
kernel to be PIE compatible.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
)
.text sections:
- PIE disabled: 9373572 bytes (+0.04% from baseline)
- PIE enabled: 9499138 bytes (+1.38% from baseline)
The big decrease in vmlinux file size is due to the lower number of
relocations appended to the file.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
ar
Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/tools/relocs.c | 74 +++--
1 file changed, 65 insertions(+), 9 deletions(-)
the top 2G and 32-bit
integers are not enough.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/tools/relocs.c| 60 +-
arch/x86/tools/relocs.h| 4 +--
arch/x86/tools/relocs_common.c | 15 +++
3 files changed, 60 inse
still expect kernel functions to be within
2G and generate relative calls. To solve this issue, the PLT arm64 code
was adapted for x86_64. When a relative relocation go outside its range,
a dynamic PLT entry is used to correctly jump to the destination.
Signed-off-by: Thomas Garnier <th
Add a new _ASM_GET_PTR macro to fetch a symbol address. It will be used
to replace "_ASM_MOV $, %dst" code construct that are not compatible
with PIE.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/include/asm/asm.h | 13 +
1 file changed, 13 ins
range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/xen/xen-asm.h | 3 ++-
arch/x86/xen/xen-head.S | 9 +
2 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/arch/x86/xen/xen-asm.h b/arch/x86/xen/xen-asm.h
index 465276
Change the assembly code to use only relative references of symbols for the
kernel to be PIE compatible.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/include/asm/kvm_host.h | 6 --
arch/x86/kernel/kvm.c | 6 --
arch/x86/kvm/svm.c | 4 ++--
3 files changed, 10 insertions(+), 6 deletions(-)
diff
three PUD pages.
The relocation table uses 64-bit integers generated with the updated
relocation tool with the large-reloc option.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/Kconfig | 21 +
arch/x86/boot/compressed/Makefile
Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/entry/entry_64.S | 4 ++--
arch/x86/include/asm/percpu.h | 25 +++--
arch/x86/kernel/cpu/common.c
Provide an option to default visibility to hidden except for key
symbols. This option is disabled by default and will be used by x86_64
PIE support to remove errors between compilation units.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/boot/boot.h | 2 +-
ar
Change the assembly code to use only relative references of symbols for the
kernel to be PIE compatible.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
Replace the %c constraint with %P. The %c is incompatible with PIE
because it implies an immediate value whereas %P reference a symbol.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier
memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/kernel/head64.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index 46c3c73e7f43..4103e90ff128 100644
--- a/arch/x86/kernel/he
randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgar...@google.com>
---
arch/x86/include/asm/processor.h | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 028245
On Tue, Jul 18, 2017 at 8:59 PM, Brian Gerst <brge...@gmail.com> wrote:
> On Tue, Jul 18, 2017 at 9:35 PM, H. Peter Anvin <h...@zytor.com> wrote:
>> On 07/18/17 15:33, Thomas Garnier wrote:
>>> With PIE support and KASLR extended range, the modules may be further
On Tue, Jul 18, 2017 at 8:08 PM, Brian Gerst <brge...@gmail.com> wrote:
> On Tue, Jul 18, 2017 at 6:33 PM, Thomas Garnier <thgar...@google.com> wrote:
>> Perpcu uses a clever design where the .percu ELF section has a virtual
>> address of zero and the relocation cod
On Tue, Jul 18, 2017 at 7:49 PM, Brian Gerst <brge...@gmail.com> wrote:
> On Tue, Jul 18, 2017 at 6:33 PM, Thomas Garnier <thgar...@google.com> wrote:
>> Change the assembly code to use only relative references of symbols for the
>> kernel to be PIE compatible. The
On Wed, Jul 19, 2017 at 10:34 AM, Brian Gerst <brge...@gmail.com> wrote:
> On Wed, Jul 19, 2017 at 11:58 AM, Thomas Garnier <thgar...@google.com> wrote:
>> On Tue, Jul 18, 2017 at 8:59 PM, Brian Gerst <brge...@gmail.com> wrote:
>>> On Tue, Jul 18, 2017 at 9:3
On Wed, Jul 19, 2017 at 3:27 PM, H. Peter Anvin <h...@zytor.com> wrote:
> On 07/19/17 08:40, Thomas Garnier wrote:
>>>
>>> This doesn't look right. It's accessing a per-cpu variable. The
>>> per-cpu section is an absolute, zero-based section and not subje
On Wed, Jul 19, 2017 at 3:33 PM, H. Peter Anvin <h...@zytor.com> wrote:
> On 07/18/17 15:33, Thomas Garnier wrote:
>> The x86 relocation tool generates a list of 32-bit signed integers. There
>> was no need to use 64-bit integers because all addresses where above the 2G
On Wed, Jul 19, 2017 at 3:58 PM, H. Peter Anvin <h...@zytor.com> wrote:
> On 07/18/17 15:33, Thomas Garnier wrote:
>> Change the assembly code to use only relative references of symbols for the
>> kernel to be PIE compatible.
>>
>> Position Independent Ex
On Wed, Jul 19, 2017 at 4:08 PM, H. Peter Anvin <h...@zytor.com> wrote:
> On 07/19/17 15:47, Thomas Garnier wrote:
>> On Wed, Jul 19, 2017 at 3:33 PM, H. Peter Anvin <h...@zytor.com> wrote:
>>> On 07/18/17 15:33, Thomas Garnier wrote:
>>>> The x86 relocat
On Thu, Jul 20, 2017 at 7:26 AM, Thomas Garnier <thgar...@google.com> wrote:
> On Wed, Jul 19, 2017 at 4:33 PM, H. Peter Anvin <h...@zytor.com> wrote:
>> On 07/19/17 11:26, Thomas Garnier wrote:
>>> On Tue, Jul 18, 2017 at 8:08 PM, Brian Gerst <brge...@gmail.com&
On Wed, Aug 2, 2017 at 9:56 AM, Kees Cook <keesc...@chromium.org> wrote:
> On Wed, Aug 2, 2017 at 9:42 AM, Thomas Garnier <thgar...@google.com> wrote:
>> I noticed that not only we have the problem of gs:0x40 not being
>> accessible. The compiler will default to th
On Wed, Aug 16, 2017 at 8:12 AM, Ingo Molnar <mi...@kernel.org> wrote:
>
>
> * Thomas Garnier <thgar...@google.com> wrote:
>
> > On Tue, Aug 15, 2017 at 12:56 AM, Ingo Molnar <mi...@kernel.org> wrote:
> > >
> > > * Thomas Garnier <thgar...@
On Thu, Aug 17, 2017 at 1:09 AM, Ingo Molnar <mi...@kernel.org> wrote:
>
>
> * Thomas Garnier <thgar...@google.com> wrote:
>
> > > > -model=small/medium assume you are on the low 32-bit. It generates
> > > > instructions where the virtual ad
t; > window, but in reality I've been procrastinating this is due to the
> > permanent,
> > non-trivial impact PIE has on generated C code. )
> >
> > * Thomas Garnier <thgar...@google.com> wrote:
> >
> >> 1) PIE sometime needs two instructions to represent a
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