Re: [Xen-devel] [PATCH] KVM: arm64: add workaround for Cortex-A57 erratum #852523

[Christoffer Dall]

On Mon, Sep 14, 2015 at 04:46:28PM +0100, Marc Zyngier wrote:
> On 14/09/15 16:06, Will Deacon wrote:
> > When restoring the system register state for an AArch32 guest at EL2,
> > writes to DACR32_EL2 may not be correctly synchronised by Cortex-A57,
> > which can lead to the guest effectively running with junk in the DACR
> > and running into unexpected domain faults.
> > 
> > This patch works around the issue by re-ordering our restoration of the
> > AArch32 register aliases so that they happen before the AArch64 system
> > registers. Ensuring that the registers are restored in this order
> > guarantees that they will be correctly synchronised by the core.
> > 
> > Cc: 
> > Cc: Marc Zyngier 
> > Signed-off-by: Will Deacon 
> 
> Reviewed-by: Marc Zyngier 
> 

Looks good to me too, and I just gave this a spin with my loop test on
Juno as well.

Thanks,
-Christoffer

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Re: [Xen-devel] [PATCH] KVM: arm64: add workaround for Cortex-A57 erratum #852523

[Ian Campbell]

On Tue, 2015-09-15 at 00:08 +0100, Julien Grall wrote:
> On 14/09/2015 16:58, Will Deacon wrote:
> > > The Xen ctxt switch code[0] has DACR_EL2 in the midst of it all, and
> > > certainly followed by some sysregs, which I've got my fingers crossed
> > > happens to be sufficient (other than maybe adding a comment).
> > 
> > It looks like you restore CONTEXTIDR_EL1 fairly late, so you should be
> > ok.

Thanks Will.

> It may be worth to have a comment in the code explaining the errata to 
> avoid introduce by inadvertence if we plan to re-order the context
> switch.
> 
> I can send a patch for that.

Yes, please, a comment right before we restore DACR32_EL2 with the list of
register Will gave would be best I think.

> 
> Regards,
> 

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Re: [Xen-devel] [PATCH] KVM: arm64: add workaround for Cortex-A57 erratum #852523

[Will Deacon]

Hi Ian,

On Mon, Sep 14, 2015 at 04:36:28PM +0100, Ian Campbell wrote:
> On Mon, 2015-09-14 at 16:06 +0100, Will Deacon wrote:
> > When restoring the system register state for an AArch32 guest at EL2,
> > writes to DACR32_EL2 may not be correctly synchronised by Cortex-A57,
> > which can lead to the guest effectively running with junk in the DACR
> > and running into unexpected domain faults.
> 
> Thanks for the CC, dropping down to just the Xen folks/list and you guys.
> 
> The errata doc I've got doesn't yet cover this, so I've a few questions.

It should be updated in the next few days, but I wanted to get this out
ASAP since it's quite easy to hit under KVM (particularly with the new
domain-based PAN implementation for arch/arm/).

> > This patch works around the issue by re-ordering our restoration of the
> > AArch32 register aliases so that they happen before the AArch64 system
> > registers. Ensuring that the registers are restored in this order
> > guarantees that they will be correctly synchronised by the core.
> 
> Is it required that the AArch32 aliases are all restored strictly before
> the AArch64 sysregs, or just that at least one sysreg is restored after
> DACR32_EL2 (or a specific one?)?

Take your pick from: SCTLR_EL1, TCR_EL1, TTBR0_EL1, TTBR1_EL1, or
CONTEXTIDR_EL1. Writing any of those after DACR32_EL2 will avoid the
erratum.

> The Xen ctxt switch code[0] has DACR_EL2 in the midst of it all, and
> certainly followed by some sysregs, which I've got my fingers crossed
> happens to be sufficient (other than maybe adding a comment).

It looks like you restore CONTEXTIDR_EL1 fairly late, so you should be
ok.

Will

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[Xen-devel] [PATCH] KVM: arm64: add workaround for Cortex-A57 erratum #852523

[Will Deacon]

When restoring the system register state for an AArch32 guest at EL2,
writes to DACR32_EL2 may not be correctly synchronised by Cortex-A57,
which can lead to the guest effectively running with junk in the DACR
and running into unexpected domain faults.

This patch works around the issue by re-ordering our restoration of the
AArch32 register aliases so that they happen before the AArch64 system
registers. Ensuring that the registers are restored in this order
guarantees that they will be correctly synchronised by the core.

Cc: 
Cc: Marc Zyngier 
Signed-off-by: Will Deacon 
---
 arch/arm64/kvm/hyp.S | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/kvm/hyp.S b/arch/arm64/kvm/hyp.S
index 3c4f641451bb..c4016d411f4a 100644
--- a/arch/arm64/kvm/hyp.S
+++ b/arch/arm64/kvm/hyp.S
@@ -739,6 +739,9 @@ ENTRY(__kvm_vcpu_run)
// Guest context
add x2, x0, #VCPU_CONTEXT
 
+   // We must restore the 32-bit state before the sysregs, thanks
+   // to Cortex-A57 erratum #852523.
+   restore_guest_32bit_state
bl __restore_sysregs
 
skip_debug_state x3, 1f
@@ -746,7 +749,6 @@ ENTRY(__kvm_vcpu_run)
kern_hyp_va x3
bl  __restore_debug
 1:
-   restore_guest_32bit_state
restore_guest_regs
 
// That's it, no more messing around.
-- 
2.1.4


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Re: [Xen-devel] [PATCH] KVM: arm64: add workaround for Cortex-A57 erratum #852523

[Marc Zyngier]

On 14/09/15 16:06, Will Deacon wrote:
> When restoring the system register state for an AArch32 guest at EL2,
> writes to DACR32_EL2 may not be correctly synchronised by Cortex-A57,
> which can lead to the guest effectively running with junk in the DACR
> and running into unexpected domain faults.
> 
> This patch works around the issue by re-ordering our restoration of the
> AArch32 register aliases so that they happen before the AArch64 system
> registers. Ensuring that the registers are restored in this order
> guarantees that they will be correctly synchronised by the core.
> 
> Cc: 
> Cc: Marc Zyngier 
> Signed-off-by: Will Deacon 

Reviewed-by: Marc Zyngier 

I'll queue that together with the next batch of fixes.

Thanks,

M.
-- 
Jazz is not dead. It just smells funny...

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Re: [Xen-devel] [PATCH] KVM: arm64: add workaround for Cortex-A57 erratum #852523

[Ian Campbell]

On Mon, 2015-09-14 at 16:06 +0100, Will Deacon wrote:
> When restoring the system register state for an AArch32 guest at EL2,
> writes to DACR32_EL2 may not be correctly synchronised by Cortex-A57,
> which can lead to the guest effectively running with junk in the DACR
> and running into unexpected domain faults.

Thanks for the CC, dropping down to just the Xen folks/list and you guys.

The errata doc I've got doesn't yet cover this, so I've a few questions.

> This patch works around the issue by re-ordering our restoration of the
> AArch32 register aliases so that they happen before the AArch64 system
> registers. Ensuring that the registers are restored in this order
> guarantees that they will be correctly synchronised by the core.

Is it required that the AArch32 aliases are all restored strictly before
the AArch64 sysregs, or just that at least one sysreg is restored after
DACR32_EL2 (or a specific one?)?

The Xen ctxt switch code[0] has DACR_EL2 in the midst of it all, and
certainly followed by some sysregs, which I've got my fingers crossed
happens to be sufficient (other than maybe adding a comment).

Cheers,
Ian.

[0] 
http://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/arch/arm/domain.c;h=b2bfc7d293ada3cd1695873c014e71d809c8e69d;hb=HEAD#l104
 
> 
> Cc: 
> Cc: Marc Zyngier 
> Signed-off-by: Will Deacon 
> ---
>  arch/arm64/kvm/hyp.S | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/kvm/hyp.S b/arch/arm64/kvm/hyp.S
> index 3c4f641451bb..c4016d411f4a 100644
> --- a/arch/arm64/kvm/hyp.S
> +++ b/arch/arm64/kvm/hyp.S
> @@ -739,6 +739,9 @@ ENTRY(__kvm_vcpu_run)
>   // Guest context
>   add x2, x0, #VCPU_CONTEXT
>  
> + // We must restore the 32-bit state before the sysregs, thanks
> + // to Cortex-A57 erratum #852523.
> + restore_guest_32bit_state
>   bl __restore_sysregs
>  
>   skip_debug_state x3, 1f
> @@ -746,7 +749,6 @@ ENTRY(__kvm_vcpu_run)
>   kern_hyp_va x3
>   bl  __restore_debug
>  1:
> - restore_guest_32bit_state
>   restore_guest_regs
>  
>   // That's it, no more messing around.

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Re: [Xen-devel] [PATCH] KVM: arm64: add workaround for Cortex-A57 erratum #852523

[Will Deacon]

On Mon, Sep 14, 2015 at 04:46:28PM +0100, Marc Zyngier wrote:
> On 14/09/15 16:06, Will Deacon wrote:
> > When restoring the system register state for an AArch32 guest at EL2,
> > writes to DACR32_EL2 may not be correctly synchronised by Cortex-A57,
> > which can lead to the guest effectively running with junk in the DACR
> > and running into unexpected domain faults.
> > 
> > This patch works around the issue by re-ordering our restoration of the
> > AArch32 register aliases so that they happen before the AArch64 system
> > registers. Ensuring that the registers are restored in this order
> > guarantees that they will be correctly synchronised by the core.
> > 
> > Cc: 
> > Cc: Marc Zyngier 
> > Signed-off-by: Will Deacon 
> 
> Reviewed-by: Marc Zyngier 
> 
> I'll queue that together with the next batch of fixes.

Great, thanks Marc.

Will

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