There's no need to have anything here on ARM other than the distinction
between writable and non-writable pages (and even that could likely be
eliminated, but with a more intrusive change). Limit type to a single
bit and drop pinned and validated flags altogether.
Signed-off-by: Jan Beulich
---
Note: Compile tested only.
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -1113,8 +1113,7 @@ void share_xen_page_with_guest(struct pa
spin_lock(>page_alloc_lock);
/* The incremented type count pins as writable or read-only. */
-page->u.inuse.type_info = (readonly ? PGT_none : PGT_writable_page);
-page->u.inuse.type_info |= PGT_validated | 1;
+page->u.inuse.type_info = (readonly ? PGT_none : PGT_writable_page) | 1;
page_set_owner(page, d);
smp_wmb(); /* install valid domain ptr before updating refcnt. */
--- a/xen/common/memory.c
+++ b/xen/common/memory.c
@@ -354,8 +354,10 @@ int guest_remove_page(struct domain *d,
rc = guest_physmap_remove_page(d, _gfn(gmfn), mfn, 0);
+#ifdef _PGT_pinned
if ( !rc && test_and_clear_bit(_PGT_pinned, >u.inuse.type_info) )
put_page_and_type(page);
+#endif
/*
* With the lack of an IOMMU on some platforms, domains with DMA-capable
--- a/xen/include/asm-arm/mm.h
+++ b/xen/include/asm-arm/mm.h
@@ -77,20 +77,12 @@ struct page_info
#define PG_shift(idx) (BITS_PER_LONG - (idx))
#define PG_mask(x, idx) (x ## UL << PG_shift(idx))
-#define PGT_none PG_mask(0, 4) /* no special uses of this page */
-#define PGT_writable_page PG_mask(7, 4) /* has writable mappings? */
-#define PGT_type_mask PG_mask(15, 4) /* Bits 28-31 or 60-63. */
-
- /* Owning guest has pinned this page to its current type? */
-#define _PGT_pinned PG_shift(5)
-#define PGT_pinnedPG_mask(1, 5)
-
- /* Has this page been validated for use as its current type? */
-#define _PGT_validatedPG_shift(6)
-#define PGT_validated PG_mask(1, 6)
+#define PGT_none PG_mask(0, 1) /* no special uses of this page */
+#define PGT_writable_page PG_mask(1, 1) /* has writable mappings? */
+#define PGT_type_mask PG_mask(1, 1) /* Bits 31 or 63. */
/* Count of uses of this frame as its current type. */
-#define PGT_count_width PG_shift(9)
+#define PGT_count_width PG_shift(2)
#define PGT_count_mask((1UL<
---
Note: Compile tested only.
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -1113,8 +1113,7 @@ void share_xen_page_with_guest(struct pa
spin_lock(>page_alloc_lock);
/* The incremented type count pins as writable or read-only. */
-page->u.inuse.type_info = (readonly ? PGT_none : PGT_writable_page);
-page->u.inuse.type_info |= PGT_validated | 1;
+page->u.inuse.type_info = (readonly ? PGT_none : PGT_writable_page) | 1;
page_set_owner(page, d);
smp_wmb(); /* install valid domain ptr before updating refcnt. */
--- a/xen/common/memory.c
+++ b/xen/common/memory.c
@@ -354,8 +354,10 @@ int guest_remove_page(struct domain *d,
rc = guest_physmap_remove_page(d, _gfn(gmfn), mfn, 0);
+#ifdef _PGT_pinned
if ( !rc && test_and_clear_bit(_PGT_pinned, >u.inuse.type_info) )
put_page_and_type(page);
+#endif
/*
* With the lack of an IOMMU on some platforms, domains with DMA-capable
--- a/xen/include/asm-arm/mm.h
+++ b/xen/include/asm-arm/mm.h
@@ -77,20 +77,12 @@ struct page_info
#define PG_shift(idx) (BITS_PER_LONG - (idx))
#define PG_mask(x, idx) (x ## UL << PG_shift(idx))
-#define PGT_none PG_mask(0, 4) /* no special uses of this page */
-#define PGT_writable_page PG_mask(7, 4) /* has writable mappings? */
-#define PGT_type_mask PG_mask(15, 4) /* Bits 28-31 or 60-63. */
-
- /* Owning guest has pinned this page to its current type? */
-#define _PGT_pinned PG_shift(5)
-#define PGT_pinnedPG_mask(1, 5)
-
- /* Has this page been validated for use as its current type? */
-#define _PGT_validatedPG_shift(6)
-#define PGT_validated PG_mask(1, 6)
+#define PGT_none PG_mask(0, 1) /* no special uses of this page */
+#define PGT_writable_page PG_mask(1, 1) /* has writable mappings? */
+#define PGT_type_mask PG_mask(1, 1) /* Bits 31 or 63. */
/* Count of uses of this frame as its current type. */
-#define PGT_count_width PG_shift(9)
+#define PGT_count_width PG_shift(2)
#define PGT_count_mask((1UL<