Re: [Xen-devel] [PATCH 2/4] xen/arm: Make AFFINITY_MASK generate correct mask for level3

[Julien Grall]

Hi Wei,

On 25/05/16 03:09, Wei Chen wrote:

The original affinity shift bits algorithm in AFFINITY_MASK is buggy,
it could not generate correct affinity shift bits of level3.
The macro MPIDR_LEVEL_SHIFT can calculate level3 affinity shift bits
correctly. We use this macro in AFFINITY_MASK to generate correct
mask for level3.
Signed-off-by: Wei Chen 


Reviewed-by: Julien Grall 

Regards,

--
Julien Grall

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[Xen-devel] [PATCH 2/4] xen/arm: Make AFFINITY_MASK generate correct mask for level3

[Wei Chen]

The original affinity shift bits algorithm in AFFINITY_MASK is buggy,
it could not generate correct affinity shift bits of level3.
The macro MPIDR_LEVEL_SHIFT can calculate level3 affinity shift bits
correctly. We use this macro in AFFINITY_MASK to generate correct
mask for level3.

Signed-off-by: Wei Chen 
---
 xen/include/asm-arm/processor.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h
index 7de9c8e..b4cce7e 100644
--- a/xen/include/asm-arm/processor.h
+++ b/xen/include/asm-arm/processor.h
@@ -21,7 +21,6 @@
 #define MPIDR_HWID_MASK _AC(0xff,U)
 #define MPIDR_INVALID   (~MPIDR_HWID_MASK)
 #define MPIDR_LEVEL_BITS(8)
-#define AFFINITY_MASK(level)~((_AC(0x1,U) << ((level) * MPIDR_LEVEL_BITS)) 
- 1)
 
 
 /*
@@ -37,6 +36,8 @@
 #define MPIDR_AFFINITY_LEVEL(mpidr, level) \
  ((mpidr >> MPIDR_LEVEL_SHIFT(level)) & MPIDR_LEVEL_MASK)
 
+#define AFFINITY_MASK(level)~((_AC(0x1,UL) << MPIDR_LEVEL_SHIFT(level)) - 
1)
+
 /* TTBCR Translation Table Base Control Register */
 #define TTBCR_EAE_AC(0x8000,U)
 #define TTBCR_N_MASK _AC(0x07,U)
-- 
2.7.4


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