On Thu, 2014-11-27 at 18:02 +, Julien Grall wrote:
state at the GIC level. This would also avoid masking the output signal
and requires specific handling in the guest OS.
which requires?
It doesn't seem quite right to me otherwise, since context switching the
virq state *removes* the need
On Tue, 2014-11-25 at 17:44 +, Julien Grall wrote:
ARMv8 model may not disable correctly the timer interrupt when Xen
correct disable
context switch to an idle vCPU. Therefore Xen may receive a spurious
context switches and s/spurious/unexpected/ (since spurious has a
specific meaning in
On Thu, 27 Nov 2014, Ian Campbell wrote:
On Tue, 2014-11-25 at 17:44 +, Julien Grall wrote:
ARMv8 model may not disable correctly the timer interrupt when Xen
correct disable
context switch to an idle vCPU. Therefore Xen may receive a spurious
context switches and
Hi Stefano,
On 27/11/14 10:51, Stefano Stabellini wrote:
On Thu, 27 Nov 2014, Ian Campbell wrote:
On Tue, 2014-11-25 at 17:44 +, Julien Grall wrote:
ARMv8 model may not disable correctly the timer interrupt when Xen
correct disable
context switch to an idle vCPU. Therefore Xen may
Hi Ian,
On 27/11/14 10:40, Ian Campbell wrote:
On Tue, 2014-11-25 at 17:44 +, Julien Grall wrote:
ARMv8 model may not disable correctly the timer interrupt when Xen
correct disable
context switch to an idle vCPU. Therefore Xen may receive a spurious
context switches and
ARMv8 model may not disable correctly the timer interrupt when Xen
context switch to an idle vCPU. Therefore Xen may receive a spurious
timer interrupt. As the idle domain doesn't have vGIC, Xen will crash
when trying to inject the interrupt with the following stack trace.
(XEN)
