Re: [Xen-devel] [PATCH v1 04/13] x86: implement data structure and CPU init flow for MBA

2017-08-17 Thread Wei Liu
On Wed, Aug 16, 2017 at 03:18:13PM +0800, Yi Sun wrote: > On 17-08-15 11:50:15, Wei Liu wrote: > > > struct feat_node { > > > -/* cos_max and cbm_len are common values for all features so far. */ > > > +/* cos_max is common values for all features so far. */ > > > unsigned int

Re: [Xen-devel] [PATCH v1 04/13] x86: implement data structure and CPU init flow for MBA

2017-08-16 Thread Yi Sun
On 17-08-15 11:50:15, Wei Liu wrote: > On Wed, Aug 09, 2017 at 03:41:43PM +0800, Yi Sun wrote: > > -#define PSR_CAT(1<<1) > > -#define PSR_CDP(1<<2) > > +#define PSR_CMT(1u << 0) > > +#define PSR_CAT(1u << 1) > > +#define PSR_CDP(1u << 2) > > +#define

Re: [Xen-devel] [PATCH v1 04/13] x86: implement data structure and CPU init flow for MBA

2017-08-15 Thread Chao Peng
On Wed, 2017-08-09 at 15:41 +0800, Yi Sun wrote: > This patch implements main data structures of MBA. > > Like CAT features, MBA HW info has cos_max which means the max cos > registers number, and thrtl_max which means the max throttle value Similarly, there is no existence of 'cos register',

Re: [Xen-devel] [PATCH v1 04/13] x86: implement data structure and CPU init flow for MBA

2017-08-15 Thread Wei Liu
On Wed, Aug 09, 2017 at 03:41:43PM +0800, Yi Sun wrote: > This patch implements main data structures of MBA. > > Like CAT features, MBA HW info has cos_max which means the max cos > registers number, and thrtl_max which means the max throttle value > (delay value). It also has a flag to represent

[Xen-devel] [PATCH v1 04/13] x86: implement data structure and CPU init flow for MBA

2017-08-09 Thread Yi Sun
This patch implements main data structures of MBA. Like CAT features, MBA HW info has cos_max which means the max cos registers number, and thrtl_max which means the max throttle value (delay value). It also has a flag to represent if the throttle value is linear or not. One COS register of MBA