On 24.04.2025 03:08, Fabian Specht wrote:
> we discovered a bug regarding undefined behaviour in the FPU emulation
> unit.
>
> if ( !s->rex_prefix )
> {
> /* Convert 32-bit real/vm86 to 32-bit prot format. */
> unsigned int fip = fpstate.env.mode.real.fip_lo +
>
On 23.04.2025 23:22, Jason Andryuk wrote:
> --- a/xen/drivers/vpci/msix.c
> +++ b/xen/drivers/vpci/msix.c
> @@ -666,7 +666,7 @@ int vpci_make_msix_hole(const struct pci_dev *pdev)
> put_gfn(d, start);
> gprintk(XENLOG_WARNING,
> "%pp: exist
On 23.04.2025 19:54, victorm.l...@amd.com wrote:
> From: Nicola Vetrini
>
> MISRA C Rules 21.1 ("#define and #undef shall not be used on a
> reserved identifier or reserved macro name") and R21.2 ("A reserved
> identifier or reserved macro name shall not be declared") violations
> are not problem
On 23.04.2025 22:41, Stefano Stabellini wrote:
> On Wed, 23 Apr 2025, Lira, Victor M wrote:
>> Continuing a discussion from before:
>>
>> On 4/22/2025 11:44 PM, Jan Beulich wrote:
>>> Caution: This message originated from an External Source. Use proper caution
>>> when opening attachments, clicking
On 23.04.2025 22:37, Stefano Stabellini wrote:
> On Wed, 23 Apr 2025, Jan Beulich wrote:
>> On 23.04.2025 01:43, victorm.l...@amd.com wrote:
>>> From: Nicola Vetrini
>>>
>>> MISRA C Rules 21.1 ("#define and #undef shall not be used on a
>>> reserved identifier or reserved macro name") and R21.2 ("
On Wed, Apr 23, 2025 at 03:08:18PM +0200, Jan Beulich wrote:
> On 23.04.2025 15:01, Alejandro Vallejo wrote:
> > On Fri Apr 18, 2025 at 11:53 PM BST, dmkhn wrote:
> >> On Thu, Apr 17, 2025 at 01:48:29PM +0100, Alejandro Vallejo wrote:
> >>> --- a/xen/common/domain-builder/fdt.h
> >>> +++ b/xen/comm
From: Oleksandr Andrushchenko
Some of the PCI host bridges require additional processing during the
probe phase. For that they need to access struct bridge of the probed
host, so return pointer to the new bridge from pci_host_common_probe.
Signed-off-by: Oleksandr Andrushchenko
Signed-off-by: M
On 4/22/25 01:21, Xin Li (Intel) wrote:
> static __always_inline void sev_es_wr_ghcb_msr(u64 val)
> {
> - u32 low, high;
> -
> - low = (u32)(val);
> - high = (u32)(val >> 32);
> -
> - native_wrmsr(MSR_AMD64_SEV_ES_GHCB, low, high);
> + native_wrmsrq(MSR_AMD64_SEV_ES_GHCB, val
Hi Julien,
Thanks a lot for review!
On Wed, Apr 23, 2025 at 12:22:39PM +0100, Julien Grall wrote:
> Hi Denis,
>
> On 22/04/2025 22:54, dm...@proton.me wrote:
> > From: Denis Mukhin
> >
> > Currently, hypervisor code has two different non-system domain ID allocation
> > algorithms:
> >
> >(a
Dear Xen-Devel team,
we discovered a bug regarding undefined behaviour in the FPU emulation
unit.
if ( !s->rex_prefix )
{
/* Convert 32-bit real/vm86 to 32-bit prot format. */
unsigned int fip = fpstate.env.mode.real.fip_lo +
(fpstate.env
On 4/23/2025 8:51 AM, Dave Hansen wrote:
On 4/22/25 01:21, Xin Li (Intel) wrote:
static __always_inline void sev_es_wr_ghcb_msr(u64 val)
{
- u32 low, high;
-
- low = (u32)(val);
- high = (u32)(val >> 32);
-
- native_wrmsr(MSR_AMD64_SEV_ES_GHCB, low, high);
+ na
On 23/04/2025 9:55 pm, Stefano Stabellini wrote:
> On Wed, 23 Apr 2025, Nicola Vetrini wrote:
>> __inline was not mentioned in C-language-toolchain.rst, while
>> __inline__ is not used in code under xen/. __inline is kept because it
>> may be used in Xen. The ECLAIR configuration is now consistent
On 2025-04-23 17:22, Jason Andryuk wrote:
The format string lacks a space, so mfn and type run together:
(XEN) d0v0 :06:00.7: existing mapping (mfn: 753037type: 0) at 0x1 clobbers
MSIX MMIO area
Add a space.
Fixes: 677053fac17a ("vpci/msix: carve p2m hole for MSIX MMIO regions")
if we w
On 23/04/2025 7:45 pm, Sergii Dmytruk wrote:
> On Wed, Apr 23, 2025 at 02:38:37PM +0100, Andrew Cooper wrote:
>> On 22/04/2025 6:14 pm, Andrew Cooper wrote:
>>> I've stripped out the sha2 patch and fixed up to use the existing sha2,
>>> then kicked off some CI testing:
>>>
>>> https://gitlab.com/xe
On Wed, Apr 23, 2025 at 12:52:58PM +0100, Alejandro Vallejo wrote:
> On Fri Apr 18, 2025 at 10:55 PM BST, dmkhn wrote:
> > On Thu, Apr 17, 2025 at 01:48:25PM +0100, Alejandro Vallejo wrote:
> >> From: "Daniel P. Smith"
> >>
> >> Introduce the domain builder which is capable of consuming a device t
On Wed, Apr 23, 2025 at 10:11:35PM +0200, Nicola Vetrini wrote:
> On 2025-04-23 20:45, Sergii Dmytruk wrote:
> > On Wed, Apr 23, 2025 at 02:38:37PM +0100, Andrew Cooper wrote:
> > > On 22/04/2025 6:14 pm, Andrew Cooper wrote:
> > > > I've stripped out the sha2 patch and fixed up to use the existing
On Wed, Apr 23, 2025 at 05:22:29PM -0400, Jason Andryuk wrote:
> The format string lacks a space, so mfn and type run together:
> (XEN) d0v0 :06:00.7: existing mapping (mfn: 753037type: 0) at 0x1
> clobbers MSIX MMIO area
>
> Add a space.
>
> Signed-off-by: Jason Andryuk
Reviewed-by: Denis
On Wed, 23 Apr 2025, Julien Grall wrote:
> Hi Nicola,
>
> On 23/04/2025 22:09, Nicola Vetrini wrote:
> > On 2025-04-23 22:48, Julien Grall wrote:
> > > Hi Victor,
> > >
> > > On 23/04/2025 18:54, victorm.l...@amd.com wrote:
> > > > From: Nicola Vetrini
> > > >
> > > > MISRA C Rule 10.1 states:
On Wed, Apr 23, 2025 at 05:28:21PM -0400, Jason Andryuk wrote:
> With a tab stop of 8, the alignment is off. Replace the hard tabs with
> spaces to match the file.
>
> Fixes: 284d5633be37 ("Tools: add online/offline hotplug user interfaces")
> Signed-off-by: Jason Andryuk
Reviewed-by: Denis Muk
On Wed, Apr 23, 2025 at 05:28:20PM -0400, Jason Andryuk wrote:
> Add some missing newlines to error messages.
>
> Fixes: 284d5633be37 ("Tools: add online/offline hotplug user interfaces")
> Signed-off-by: Jason Andryuk
Reviewed-by: Denis Mukhin
> ---
> tools/misc/xen-hptool.c | 4 ++--
> 1 fi
With a tab stop of 8, the alignment is off. Replace the hard tabs with
spaces to match the file.
Fixes: 284d5633be37 ("Tools: add online/offline hotplug user interfaces")
Signed-off-by: Jason Andryuk
---
tools/misc/xen-hptool.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff -
Two small cleanups for xen-hptool.
Jason Andryuk (2):
tools/xen-hptool: Add missing newlines
tools/xen-hptool: Replace hard tabs
tools/misc/xen-hptool.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
--
2.49.0
Add some missing newlines to error messages.
Fixes: 284d5633be37 ("Tools: add online/offline hotplug user interfaces")
Signed-off-by: Jason Andryuk
---
tools/misc/xen-hptool.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tools/misc/xen-hptool.c b/tools/misc/xen-hptool.
The format string lacks a space, so mfn and type run together:
(XEN) d0v0 :06:00.7: existing mapping (mfn: 753037type: 0) at 0x1 clobbers
MSIX MMIO area
Add a space.
Signed-off-by: Jason Andryuk
---
xen/drivers/vpci/msix.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
Hi Nicola,
On 23/04/2025 22:09, Nicola Vetrini wrote:
On 2025-04-23 22:48, Julien Grall wrote:
Hi Victor,
On 23/04/2025 18:54, victorm.l...@amd.com wrote:
From: Nicola Vetrini
MISRA C Rule 10.1 states:
"Operands shall not be of an inappropriate essential type"
The unary minus operator appl
On 2025-04-23 22:48, Julien Grall wrote:
Hi Victor,
On 23/04/2025 18:54, victorm.l...@amd.com wrote:
From: Nicola Vetrini
MISRA C Rule 10.1 states:
"Operands shall not be of an inappropriate essential type"
The unary minus operator applied to an unsigned quantity has
a semantics (wrap around
On Wed, 23 Apr 2025, Mykyta Poturai wrote:
> From: Oleksandr Andrushchenko
>
> Add support for Renesas R-Car Gen4 PCI host controller, specifically
> targeting the S4 and V4H SoCs. The implementation includes configuration
> read/write operations for both root and child buses. For accessing the
>
On Wed, 23 Apr 2025, Mykyta Poturai wrote:
> From: Oleksandr Andrushchenko
>
> PCI host bridges often have different ways to access the root and child
> bus configuration spaces. One of the examples is Designware's host bridge
> and its multiple clones [1].
>
> Linux kernel implements this by in
On Wed, 23 Apr 2025, Mykyta Poturai wrote:
> From: Oleksandr Andrushchenko
>
> Some of the PCI host bridges require additional processing during the
> probe phase. For that they need to access struct bridge of the probed
> host, so return pointer to the new bridge from pci_host_common_probe.
>
>
On Wed, 23 Apr 2025, Nicola Vetrini wrote:
> __inline was not mentioned in C-language-toolchain.rst, while
> __inline__ is not used in code under xen/. __inline is kept because it
> may be used in Xen. The ECLAIR configuration is now consistent with the
> documented extensions in the rst file.
>
>
On Wed, 23 Apr 2025, victorm.l...@amd.com wrote:
> From: Nicola Vetrini
>
> MISRA C Rules 21.1 ("#define and #undef shall not be used on a
> reserved identifier or reserved macro name") and R21.2 ("A reserved
> identifier or reserved macro name shall not be declared") violations
> are not problem
On Wed, 23 Apr 2025, victorm.l...@amd.com wrote:
> From: Federico Serafini
>
> MISRA C Rule 5.5 states that:
> "Identifiers shall be distinct from macro names".
>
> A common pattern in Xen is to have a function-like macro that acts as a
> "wrapper" for the function to be called:
> before calling
On Wed, 23 Apr 2025, Stefano Stabellini wrote:
> On Wed, 23 Apr 2025, victorm.l...@amd.com wrote:
> > From: Federico Serafini
> >
> > MISRA C Rule 5.5 states that:
> > "Identifiers shall be distinct from macro names".
> >
> > A common pattern in Xen is to have a function-like macro that acts as
Hi Victor,
On 23/04/2025 18:54, victorm.l...@amd.com wrote:
From: Nicola Vetrini
MISRA C Rule 10.1 states:
"Operands shall not be of an inappropriate essential type"
The unary minus operator applied to an unsigned quantity has
a semantics (wrap around) that is well-known to all Xen developers
> From: Nicola Vetrini
>
> MISRA C Rule 10.1 states:
> "Operands shall not be of an inappropriate essential type"
>
> The unary minus operator applied to an unsigned quantity has
> a semantics (wrap around) that is well-known to all Xen developers.
> Thus, this operation is deemed safe.
>
> No
__inline was not mentioned in C-language-toolchain.rst, while
__inline__ is not used in code under xen/. __inline is kept because it
may be used in Xen. The ECLAIR configuration is now consistent with the
documented extensions in the rst file.
No functional change.
Signed-off-by: Nicola Vetrini
On Wed, 23 Apr 2025, Lira, Victor M wrote:
> Continuing a discussion from before:
>
> On 4/22/2025 11:44 PM, Jan Beulich wrote:
> > Caution: This message originated from an External Source. Use proper caution
> > when opening attachments, clicking links, or responding.
> >
> >
> > On 23.04.2025
On Wed, 23 Apr 2025, Jan Beulich wrote:
> On 23.04.2025 01:43, victorm.l...@amd.com wrote:
> > From: Nicola Vetrini
> >
> > MISRA C Rules 21.1 ("#define and #undef shall not be used on a
> > reserved identifier or reserved macro name") and R21.2 ("A reserved
> > identifier or reserved macro name
On 2025-04-23 20:45, Sergii Dmytruk wrote:
On Wed, Apr 23, 2025 at 02:38:37PM +0100, Andrew Cooper wrote:
On 22/04/2025 6:14 pm, Andrew Cooper wrote:
> I've stripped out the sha2 patch and fixed up to use the existing sha2,
> then kicked off some CI testing:
>
> https://gitlab.com/xen-project/ha
On 4/23/2025 8:06 AM, Dave Hansen wrote:
On 4/23/25 07:28, Sean Christopherson wrote:
Now that rdpmc() is gone, i.e. rdpmcl/rdpmcq() is the only helper, why not
simply
rename rdpmcl() => rdpmc()? I see no point in adding a 'q' qualifier; it
doesn't
disambiguate anything and IMO is pure noise.
On 2025-04-19 18:08, Daniel P. Smith wrote:
When constructing domU, and specifically the event channels for their console
and xenstore event channels, the domid for the backing domain must be known.
Therefore, the control, hardware, and xenstore domains are deemed as core
domains, and must be con
On 2025-04-19 18:08, Daniel P. Smith wrote:
The bzimage logic uses the unit global orig_image_len to hold the original
module length for the kernel when the headroom is calculated. It then uses
orig_image_len to locate the start of the bzimage when the expansion is done.
This is an issue when mor
On 4/22/25 11:06, Sergii Dmytruk wrote:
The aim of the [TrenchBoot] project is to provide an implementation of
DRTM that is generic enough to cover various use cases:
- Intel TXT and AMD SKINIT on x86 CPUs
- legacy and UEFI boot
- TPM1.2 and TPM2.0
- (in the future) DRTM on Arm CPUs
DRTM
Continuing a discussion from before:
On 4/22/2025 11:51 PM, Jan Beulich wrote:
Caution: This message originated from an External Source. Use proper caution
when opening attachments, clicking links, or responding.
On 23.04.2025 01:43, victorm.l...@amd.com wrote:
From: Nicola Vetrini
The una
On 4/23/25 07:08, Mykyta Poturai wrote:
> From: Oleksandr Andrushchenko
>
> PCI host bridges often have different ways to access the root and child
> bus configuration spaces. One of the examples is Designware's host bridge
> and its multiple clones [1].
>
> Linux kernel implements this by insta
On Wed, Apr 23, 2025 at 02:38:37PM +0100, Andrew Cooper wrote:
> On 22/04/2025 6:14 pm, Andrew Cooper wrote:
> > I've stripped out the sha2 patch and fixed up to use the existing sha2,
> > then kicked off some CI testing:
> >
> > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/17802
Continuing a discussion from before:
On 4/22/2025 11:44 PM, Jan Beulich wrote:
Caution: This message originated from an External Source. Use proper caution
when opening attachments, clicking links, or responding.
On 23.04.2025 01:43, victorm.l...@amd.com wrote:
memmove.
- Tag
From: Federico Serafini
MISRA C Rule 5.5 states that:
"Identifiers shall be distinct from macro names".
A common pattern in Xen is to have a function-like macro that acts as a
"wrapper" for the function to be called:
before calling the function, the macro adds additional checks or
increase/decre
From: Nicola Vetrini
MISRA C Rules 21.1 ("#define and #undef shall not be used on a
reserved identifier or reserved macro name") and R21.2 ("A reserved
identifier or reserved macro name shall not be declared") violations
are not problematic for Xen, as it does not use the C or POSIX
libraries.
X
From: Nicola Vetrini
MISRA C Rule 10.1 states:
"Operands shall not be of an inappropriate essential type"
The unary minus operator applied to an unsigned quantity has
a semantics (wrap around) that is well-known to all Xen developers.
Thus, this operation is deemed safe.
No functional change.
On 4/23/25 7:47 AM, Sergii Dmytruk wrote:
On Tue, Apr 22, 2025 at 01:46:14PM -0700, ross.philip...@oracle.com wrote:
+
+/*
+ * ARM DRTM Info table
+ */
+struct slr_entry_arm_info
+{
+struct slr_entry_hdr hdr;
+} __packed;
You can probably ditch this for now.
Right, it has no value at thi
On 4/23/2025 7:13 AM, Dave Hansen wrote:
On 4/22/25 01:21, Xin Li (Intel) wrote:
Relocate rdtsc{,_ordered}() from to , and
subsequently remove the inclusion of in .
Consequently, must be included in several source files
that previously did not require it.
I know it's mildly obvious but coul
On 4/23/2025 8:51 AM, Dave Hansen wrote:
On 4/22/25 01:21, Xin Li (Intel) wrote:
static __always_inline void sev_es_wr_ghcb_msr(u64 val)
{
- u32 low, high;
-
- low = (u32)(val);
- high = (u32)(val >> 32);
-
- native_wrmsr(MSR_AMD64_SEV_ES_GHCB, low, high);
+ na
On Fri, Apr 18, 2025 at 04:39:04PM -0700, Stefano Stabellini wrote:
> On Thu, 10 Apr 2025, Aleksandr Partanen wrote:
> > If we have request without lock and hit unlocked or invalid
> > entry during the search, we remap it immediately,
> > even if we have matching entry in next entries in bucket.
>
On 23.04.25 11:03, Xin Li wrote:
On 4/22/2025 4:12 AM, Jürgen Groß wrote:
+
+static __always_inline bool __rdmsrq(u32 msr, u64 *val, int type)
+{
+ bool ret;
+
+#ifdef CONFIG_XEN_PV
+ if (cpu_feature_enabled(X86_FEATURE_XENPV))
+ return __xenpv_rdmsrq(msr, val, type);
I don't thin
On 23.04.25 10:51, Xin Li wrote:
On 4/22/2025 2:57 AM, Jürgen Groß wrote:
On 22.04.25 10:22, Xin Li (Intel) wrote:
The story started from tglx's reply in [1]:
For actual performance relevant code the current PV ops mechanics
are a horrorshow when the op defaults to the native instruction
On 4/23/25 07:28, Sean Christopherson wrote:
> Now that rdpmc() is gone, i.e. rdpmcl/rdpmcq() is the only helper, why not
> simply
> rename rdpmcl() => rdpmc()? I see no point in adding a 'q' qualifier; it
> doesn't
> disambiguate anything and IMO is pure noise.
That makes total sense to me.
On Fri Apr 18, 2025 at 11:39 PM BST, dmkhn wrote:
> On Thu, Apr 17, 2025 at 01:48:28PM +0100, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith"
>>
>> Look for a subnode of type `multiboot,kernel` within a domain node. If
>> found, locate it using the multiboot module helper to generically ensur
On Fri, Apr 18, 2025 at 05:05:50PM -0400, Jason Andryuk wrote:
> The PCI device irq is read with fscanf(%u). Switch the irq variable to
> unsigned int to match.
>
> Linux driver/pci/pci-sysfs.c:irq_show() uses %u to print the value.
>
> However, unsigned int irq doesn't compile because of:
> err
6.1-stable review patch. If anyone has any objections, please let me know.
--
From: Kees Cook
[ Upstream commit 1c3dfc7c6b0f551fdca3f7c1f1e4c73be8adb17d ]
When a character array without a terminating NUL character has a static
initializer, GCC 15's -Wunterminated-string-initia
6.6-stable review patch. If anyone has any objections, please let me know.
--
From: Kees Cook
[ Upstream commit 1c3dfc7c6b0f551fdca3f7c1f1e4c73be8adb17d ]
When a character array without a terminating NUL character has a static
initializer, GCC 15's -Wunterminated-string-initia
On Fri, Apr 18, 2025 at 05:05:49PM -0400, Jason Andryuk wrote:
> A PCI device's irq field is an 8-bit number. A value of 0xff indicates
> that the device IRQ is not connected. Additionally, the Linux ACPI code
> can convert these 0xff values to IRQ_NOTCONNECTED(0x8000) because
> "0x8000 i
On Tue, Apr 22, 2025 at 01:46:14PM -0700, ross.philip...@oracle.com wrote:
> > +
> > +/*
> > + * ARM DRTM Info table
> > + */
> > +struct slr_entry_arm_info
> > +{
> > +struct slr_entry_hdr hdr;
> > +} __packed;
>
> You can probably ditch this for now.
Right, it has no value at this point.
>
On Tue, Apr 22, 2025 at 09:23:02PM +0100, Andrew Cooper wrote:
> On 22/04/2025 4:06 pm, Sergii Dmytruk wrote:
> > diff --git a/xen/include/xen/slr_table.h b/xen/include/xen/slr_table.h
> > new file mode 100644
> > index 00..e9dbac5d0a
> > --- /dev/null
> > +++ b/xen/include/xen/slr_table.h
On Wed, Apr 23, 2025 at 02:58:28PM +0200, Jan Beulich wrote:
> On 23.04.2025 11:07, Roger Pau Monné wrote:
> > On Wed, Apr 23, 2025 at 10:43:56AM +0200, Jan Beulich wrote:
> >> Without doing so we could trigger the ASSERT_UNREACHABLE() in
> >> subpage_mmio_write_emulate(). A comment there actually
On 4/22/25 01:21, Xin Li (Intel) wrote:
> rdpmc() is not used anywhere, remove it.
I'm not sure it was *ever* used (at least since git started). Thanks for
finding this.
Acked-by: Dave Hansen
On Tue, Apr 22, 2025, Xin Li (Intel) wrote:
> Signed-off-by: Xin Li (Intel)
> ---
> arch/x86/events/amd/uncore.c | 2 +-
> arch/x86/events/core.c| 2 +-
> arch/x86/events/intel/core.c | 4 ++--
> arch/x86/events/intel/ds.c| 2 +-
>
On Wed, Apr 23, 2025 at 02:13:01PM +0100, Andrew Cooper wrote:
> On 23/04/2025 12:32 pm, Roger Pau Monne wrote:
> > There are several errata on Intel regarding the usage of the MONITOR/MWAIT
> > instructions, all having in common that stores to the monitored region
> > might not wake up the CPU.
>
On 4/22/25 01:21, Xin Li (Intel) wrote:
> Signed-off-by: Xin Li (Intel)
Code: good. No changelog: bad.
Once there's some semblance of a changelog:
Acked-by: Dave Hansen
On 4/22/25 01:21, Xin Li (Intel) wrote:
> Signed-off-by: Xin Li (Intel)
We had a non-trivial discussion about the l=>q renames. Please at least
include a sentence or two about those discussions.
For the code:
Acked-by: Dave Hansen
On 4/22/25 01:21, Xin Li (Intel) wrote:
> Relocate rdtsc{,_ordered}() from to , and
> subsequently remove the inclusion of in .
> Consequently, must be included in several source files
> that previously did not require it.
I know it's mildly obvious but could you please add a problem statement
On 4/23/25 02:27, Xin Li wrote:
> One reason I chose verbose names is that short names are in use and
> renaming needs to touch a lot of files (and not fun at all).
This series is getting *WAY* too big.
Could you please peel the renaming stuff out and we can get it applied
independently of the ne
On Sat, Jun 01, 2024 at 12:48:33AM +0200, Marek Marczykowski-Górecki wrote:
> On Tue, Mar 26, 2024 at 11:00:50AM +, Julien Grall wrote:
> > Hi Marek,
> >
> > +Juergen for visibility
> >
> > When sending a bug report, I would suggest to CC relevant people as
> > otherwise it can get lost (not
On 22/04/2025 6:14 pm, Andrew Cooper wrote:
> I've stripped out the sha2 patch and fixed up to use the existing sha2,
> then kicked off some CI testing:
>
> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1780285393
> https://cirrus-ci.com/build/5452335868018688
>
> When the dust ha
On Wed, Apr 23, 2025, Xin Li wrote:
> On 4/22/2025 8:09 AM, Sean Christopherson wrote:
> > I strongly prefer that we find a way to not require such verbose APIs,
> > especially
> > if KVM ends up using native variants throughout. Xen PV is supposed to be
> > the
> > odd one out, yet native code
On 23/04/2025 12:32 pm, Roger Pau Monne wrote:
> There are several errata on Intel regarding the usage of the MONITOR/MWAIT
> instructions, all having in common that stores to the monitored region
> might not wake up the CPU.
>
> Fix them by forcing the sending of an IPI for the affected models.
>
On 23.04.2025 15:01, Alejandro Vallejo wrote:
> On Fri Apr 18, 2025 at 11:53 PM BST, dmkhn wrote:
>> On Thu, Apr 17, 2025 at 01:48:29PM +0100, Alejandro Vallejo wrote:
>>> --- a/xen/common/domain-builder/fdt.h
>>> +++ b/xen/common/domain-builder/fdt.h
>>> @@ -9,6 +9,30 @@ struct boot_info;
>>> /*
On Sat Apr 19, 2025 at 12:24 AM BST, dmkhn wrote:
> On Thu, Apr 17, 2025 at 01:48:35PM +0100, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith"
>>
>> Introduce the ability to assign capabilities to a domain via its definition
>> in
>> device tree. The first capability enabled to select is the
On Sat Apr 19, 2025 at 12:21 AM BST, dmkhn wrote:
> On Thu, Apr 17, 2025 at 01:48:33PM +0100, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith"
>>
>> Add three properties, memory, mem-min, and mem-max, to the domain node device
>> tree parsing to define the memory allocation for a domain. All t
On 23.04.2025 13:32, Roger Pau Monne wrote:
> There are several errata on Intel regarding the usage of the MONITOR/MWAIT
> instructions, all having in common that stores to the monitored region
> might not wake up the CPU.
>
> Fix them by forcing the sending of an IPI for the affected models.
>
>
On Sat Apr 19, 2025 at 12:08 AM BST, dmkhn wrote:
> On Thu, Apr 17, 2025 at 01:48:31PM +0100, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith"
>>
>> Introduce the ability to specify the desired domain id for the domain
>> definition. The domain id will be populated in the domid property of the
On Fri Apr 18, 2025 at 11:58 PM BST, dmkhn wrote:
> On Thu, Apr 17, 2025 at 01:48:30PM +0100, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith"
>>
>> Look for a subnode of type `multiboot,ramdisk` within a domain node and
>> parse via the fdt_read_multiboot_module() helper. After a successful
>
On Fri Apr 18, 2025 at 11:53 PM BST, dmkhn wrote:
> On Thu, Apr 17, 2025 at 01:48:29PM +0100, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith"
>>
>> Add support to read the command line from the hyperlauunch device tree.
>> The device tree command line is located in the "bootargs" property of
On 23.04.2025 11:07, Roger Pau Monné wrote:
> On Wed, Apr 23, 2025 at 10:43:56AM +0200, Jan Beulich wrote:
>> Without doing so we could trigger the ASSERT_UNREACHABLE() in
>> subpage_mmio_write_emulate(). A comment there actually says this
>> validation would already have been done ...
>>
>> Fixes:
On 23.04.2025 13:09, Jan Beulich wrote:
> On 23.04.2025 11:49, Andrew Cooper wrote:
>> On 23/04/2025 7:13 am, Jan Beulich wrote:
>>> @@ -5286,25 +5284,23 @@ x86_emulate(
>>> else if ( !dst.val )
>>> _regs.eflags |= X86_EFLAGS_ZF;
>>> }
>>> -else if ( z
On Fri Apr 18, 2025 at 11:30 PM BST, dmkhn wrote:
> On Thu, Apr 17, 2025 at 01:48:27PM +0100, Alejandro Vallejo wrote:
>> Hyperlaunch mandates either a reg or module-index DT prop on nodes that
>> contain `multiboot,module" under their "compatible" prop. This patch
>> introduces a helper to generic
On 23/04/2025 12:16 pm, Roger Pau Monné wrote:
> On Wed, Apr 23, 2025 at 02:02:35AM +0100, Andrew Cooper wrote:
>> The new altcall scheme uses an .alt_call_sites section. Wire this up in very
>> much the same way as the .altinstructions section, although there is less
>> sanity checking necessary.
From: Oleksandr Andrushchenko
Add support for Renesas R-Car Gen4 PCI host controller, specifically
targeting the S4 and V4H SoCs. The implementation includes configuration
read/write operations for both root and child buses. For accessing the
child bus, iATU is used for address translation.
Code
On 23.04.2025 11:49, Andrew Cooper wrote:
> On 23/04/2025 7:13 am, Jan Beulich wrote:
>> SDM revision 087 points out that apparently as of quite some time ago on
>> Intel hardware BSF and BSR may alter all arithmetic flags, not just ZF.
>> Because of the inconsistency (and because documentation doe
On Fri Apr 18, 2025 at 11:11 PM BST, dmkhn wrote:
> On Thu, Apr 17, 2025 at 01:48:26PM +0100, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith"
>>
>> Add the ability to detect both a formal hyperlaunch device tree or a dom0less
>> device tree. If the hyperlaunch device tree is found, then count
On Fri Apr 18, 2025 at 10:55 PM BST, dmkhn wrote:
> On Thu, Apr 17, 2025 at 01:48:25PM +0100, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith"
>>
>> Introduce the domain builder which is capable of consuming a device tree as
>> the
>> first boot module. If it finds a device tree as the first
On 4/16/25 8:31 AM, Jan Beulich wrote:
+}
+
+imsic_cfg.base_addr = base_addr;
+imsic_cfg.base_addr &= ~(BIT(imsic_cfg.guest_index_bits +
+ imsic_cfg.hart_index_bits +
+ IMSIC_MMIO_PAGE_SHIFT, UL) - 1);
+imsic_cfg.base_addr &= ~((BIT(imsic_cfg.g
From: Oleksandr Andrushchenko
Some of the PCI host bridges require private data. Add priv field
to struct pci_host_bridge, so such bridges may populate it with
their private data.
Signed-off-by: Oleksandr Andrushchenko
Signed-off-by: Mykyta Poturai
Reviewed-by: Stefano Stabellini
---
v3->v4:
On Fri Apr 18, 2025 at 10:16 PM BST, dmkhn wrote:
> On Thu, Apr 17, 2025 at 01:48:23PM +0100, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith"
>>
>> Add a container for the "cooked" command line for a domain. This
>> provides for the backing memory to be directly associated with the
>> domain
There are several errata on Intel regarding the usage of the MONITOR/MWAIT
instructions, all having in common that stores to the monitored region
might not wake up the CPU.
Fix them by forcing the sending of an IPI for the affected models.
The Ice Lake issue has been reproduced internally on XenS
Hi Denis,
On 22/04/2025 22:54, dm...@proton.me wrote:
From: Denis Mukhin
Currently, hypervisor code has two different non-system domain ID allocation
algorithms:
(a) Arm port allocates IDs sequentially based on max_init_domid;
(b) x86 has another algorithm implementation embedded into
On Wed, Apr 23, 2025 at 02:02:35AM +0100, Andrew Cooper wrote:
> The new altcall scheme uses an .alt_call_sites section. Wire this up in very
> much the same way as the .altinstructions section, although there is less
> sanity checking necessary.
>
> Signed-off-by: Andrew Cooper
Reviewed-by: Ro
From: Oleksandr Andrushchenko
PCI host bridges often have different ways to access the root and child
bus configuration spaces. One of the examples is Designware's host bridge
and its multiple clones [1].
Linux kernel implements this by instantiating a child bus when device
drivers provide not o
This series adds support for R-Car Gen4 PCI host controller.
To fully support the controller, the following changes were made:
- Generic mechanism to support PCI child buses is added.
- Private data for PCI host bridge and means to access it are added.
The series was tested as a part of the pci-p
On 23/04/2025 7:13 am, Jan Beulich wrote:
> SDM revision 087 points out that apparently as of quite some time ago on
> Intel hardware BSF and BSR may alter all arithmetic flags, not just ZF.
> Because of the inconsistency (and because documentation doesn't look to
> be quite right about PF), best w
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