On Thu, Jan 18, 2018 at 07:13:21AM -0700, Jan Beulich wrote:
> >>> On 03.01.18 at 09:26, wrote:
> > The previous aes insns only support legacy and AVX128.
> > Icelake added AVX256 support.
>
> Same remark here as for the pclmulqdq patch.
>
> > Signed-
On Wed, Jan 03, 2018 at 10:00:51AM -0700, Jan Beulich wrote:
> >>> On 03.01.18 at 09:26, wrote:
> > @@ -7741,6 +7752,16 @@ x86_emulate(
> > op_bytes = 16;
> > goto simd_0f3a_common;
> >
> > +case X86EMUL_OPC_66(0x0f3a, 0xce): /* gf2p8affineqb
> > $imm8,xmm/m128,xmm,xmm
On Wed, Jan 03, 2018 at 01:38:13AM -0700, Jan Beulich wrote:
> >>> On 03.01.18 at 09:26, wrote:
> > The new cpu features in intel icelake: AVX512VBMI2/GFNI/VAES/
> > AVX512VNNI/AVX512BITALG/VPCLMULQDQ.
>
> Could you please play by patch submission rules: They are to be
> sent _to_ the list, with
On Wed, Jan 03, 2018 at 01:46:09AM -0700, Jan Beulich wrote:
> > --- a/xen/include/public/arch-x86/cpufeatureset.h
> > +++ b/xen/include/public/arch-x86/cpufeatureset.h
> > @@ -228,6 +228,12 @@ XEN_CPUFEATURE(AVX512VBMI,6*32+ 1) /*A AVX-512
> > Vector Byte Manipulation Ins
> > XEN_CPUFEATUR
The previous aes insns only support legacy and AVX128.
Icelake added AVX256 support.
Signed-off-by: Yang Zhong
---
xen/arch/x86/x86_emulate/x86_emulate.c | 17 -
xen/include/asm-x86/cpufeature.h | 1 +
2 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/xen
-off-by: Yang Zhong
Acked-by: Jan Beulich
---
docs/man/xl.cfg.pod.5.in| 3 ++-
tools/libxl/libxl_cpuid.c | 6 ++
tools/misc/xen-cpuid.c | 12 +++-
xen/include/public/arch-x86/cpufeatureset.h | 6 ++
xen/tools/gen-cpuid.py
issue.
simd_0f_avx is changed to simd_0f_ymm for VAES flag.
patch 4:
rebased patch, which was acked by Jan in v3.
v3: adjust the patches sequence from Jan
v2: need implement x86 emulation for Legacy and VEX insns,
EVEX insns in next time suggested by Jan
Yang Zhong (4):
x86emul: Su
The previous vpclmulqdq only support AVX128.
Icelake added AVX256 support.
Signed-off-by: Yang Zhong
---
xen/arch/x86/x86_emulate/x86_emulate.c | 10 --
xen/include/asm-x86/cpufeature.h | 1 +
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/xen/arch/x86/x86_emulate
Signed-off-by: Yang Zhong
---
xen/arch/x86/x86_emulate/x86_emulate.c | 21 +
xen/include/asm-x86/cpufeature.h | 3 +++
2 files changed, 24 insertions(+)
diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c
b/xen/arch/x86/x86_emulate/x86_emulate.c
index 54a2756
On Mon, Nov 27, 2017 at 08:42:29AM -0700, Jan Beulich wrote:
> >>> On 10.11.17 at 11:36, wrote:
> > Signed-off-by: Yang Zhong
>
> First and foremost - did you try out your own patch? There not being
> any (minimal) test added makes this at least questionable
On Mon, Nov 27, 2017 at 08:53:24AM -0700, Jan Beulich wrote:
> >>> On 10.11.17 at 11:36, wrote:
> > @@ -7672,7 +7673,12 @@ x86_emulate(
> > host_and_vcpu_must_have(pclmulqdq);
> > if ( vex.opcx == vex_none )
> > goto simd_0f3a_common;
> > -generate_exception_
On Mon, Nov 27, 2017 at 09:30:15AM -0700, Jan Beulich wrote:
> >>> On 10.11.17 at 11:36, wrote:
> > --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> > +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> > @@ -1626,6 +1626,7 @@ static bool vcpu_has(
> > #define vcpu_has_clwb()vcpu_has( 7,
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