Re: [PATCH] x86/Viridian: don't mark IRQ vectors as pending when vLAPIC is disabled

On 21/11/2022 12:13, Jan Beulich wrote: In software-disabled state an LAPIC does not accept any interrupt requests and hence no IRR bit would newly become set while in this state. As a result it is also wrong for us to mark Viridian IPI or timer vectors as having a pending request when the

Re: [PATCH] x86/Viridian: don't mark IRQ vectors as pending when vLAPIC is disabled

On 21/11/2022 12:13, Jan Beulich wrote: > In software-disabled state an LAPIC does not accept any interrupt > requests and hence no IRR bit would newly become set while in this > state. As a result it is also wrong for us to mark Viridian IPI or timer > vectors as having a pending request when the

[PATCH] x86/Viridian: don't mark IRQ vectors as pending when vLAPIC is disabled

In software-disabled state an LAPIC does not accept any interrupt requests and hence no IRR bit would newly become set while in this state. As a result it is also wrong for us to mark Viridian IPI or timer vectors as having a pending request when the vLAPIC is in this state. Such interrupts are