Re: [PATCH v3 05/11] xen/arm: gicv3: implement handling of GICv3.1 eSPI

2025-08-27 Thread Oleksandr Tyshchenko
On 27.08.25 16:38, Leonid Komarianskyi wrote: Hello Oleksandr, Hello Leonid Thank you for your good question, I was thinking about that as well. On 27.08.25 13:25, Oleksandr Tyshchenko wrote: On 26.08.25 17:05, Leonid Komarianskyi wrote: Hello Leonid, In general patch looks good to

Re: [PATCH v3 05/11] xen/arm: gicv3: implement handling of GICv3.1 eSPI

2025-08-27 Thread Leonid Komarianskyi
Hello Oleksandr, Thank you for your good question, I was thinking about that as well. On 27.08.25 13:25, Oleksandr Tyshchenko wrote: > > > On 26.08.25 17:05, Leonid Komarianskyi wrote: > > > Hello Leonid, > > In general patch looks good to me, just one question below ... > >> Introduced app

Re: [PATCH v3 05/11] xen/arm: gicv3: implement handling of GICv3.1 eSPI

2025-08-27 Thread Oleksandr Tyshchenko
On 26.08.25 17:05, Leonid Komarianskyi wrote: Hello Leonid, In general patch looks good to me, just one question below ... Introduced appropriate register definitions, helper macros, and initialization of required GICv3.1 distributor registers to support eSPI. This type of interrupt is han

Re: [PATCH v3 05/11] xen/arm: gicv3: implement handling of GICv3.1 eSPI

2025-08-27 Thread Leonid Komarianskyi
Hello Volodymyr, Thank you for your review:) On 27.08.25 01:25, Volodymyr Babchuk wrote: > > Hi Leonid, > > Leonid Komarianskyi writes: > >> Introduced appropriate register definitions, helper macros, >> and initialization of required GICv3.1 distributor registers >> to support eSPI. This typ

Re: [PATCH v3 05/11] xen/arm: gicv3: implement handling of GICv3.1 eSPI

2025-08-26 Thread Volodymyr Babchuk
Hi Leonid, Leonid Komarianskyi writes: > Introduced appropriate register definitions, helper macros, > and initialization of required GICv3.1 distributor registers > to support eSPI. This type of interrupt is handled in the > same way as regular SPI interrupts, with the following > differences

[PATCH v3 05/11] xen/arm: gicv3: implement handling of GICv3.1 eSPI

2025-08-26 Thread Leonid Komarianskyi
Introduced appropriate register definitions, helper macros, and initialization of required GICv3.1 distributor registers to support eSPI. This type of interrupt is handled in the same way as regular SPI interrupts, with the following differences: 1) eSPIs can have up to 1024 interrupts, starting f