Re: [Xen-devel] [PATCH] x86/msr: Fix handling of MSR_AMD_PATCHLEVEL/MSR_IA32_UCODE_REV

2019-04-02 Thread Jan Beulich
>>> On 01.04.19 at 17:35, wrote: > On 01/04/2019 15:55, Jan Beulich wrote: >> >>> Secondly, when a guest executes CPUID, this doesn't >>> typically result in Xen executing a CPUID instruction in practice. >> Wait - this is true for DomU, but used to be false for (PV) Dom0, >> until you've

Re: [Xen-devel] [PATCH] x86/msr: Fix handling of MSR_AMD_PATCHLEVEL/MSR_IA32_UCODE_REV

2019-04-01 Thread Andrew Cooper
On 01/04/2019 15:55, Jan Beulich wrote: > >> Secondly, when a guest executes CPUID, this doesn't >> typically result in Xen executing a CPUID instruction in practice. > Wait - this is true for DomU, but used to be false for (PV) Dom0, > until you've switched over from pv_cpuid() to guest_cpuid().

Re: [Xen-devel] [PATCH] x86/msr: Fix handling of MSR_AMD_PATCHLEVEL/MSR_IA32_UCODE_REV

2019-04-01 Thread Jan Beulich
>>> On 01.04.19 at 16:01, wrote: > There are a number of bugs. There are no read/write hooks on the HVM side, so > guest accesses fall into the "read/write-discard" defaults, which bypass the > correct faulting behaviour and the Intel special case. > > For the PV side, writes are discarded

[Xen-devel] [PATCH] x86/msr: Fix handling of MSR_AMD_PATCHLEVEL/MSR_IA32_UCODE_REV

2019-04-01 Thread Andrew Cooper
There are a number of bugs. There are no read/write hooks on the HVM side, so guest accesses fall into the "read/write-discard" defaults, which bypass the correct faulting behaviour and the Intel special case. For the PV side, writes are discarded (again, bypassing proper faulting), except for a