Re: [Xen-devel] [PATCH] x86: vlapic: Clear vector's TMR bit upon acceptance of edge-triggered interrupt to IRR

On 03/15/2018 04:39 AM, Jan Beulich wrote: On 15.03.18 at 00:35, wrote: >> According to Intel SDM 10.8.4 Interrupt Acceptance for Fixed Interrupts: >> "The trigger mode register (TMR) indicates the trigger mode of the >> interrupt (see Figure 10-20). Upon acceptance of

Re: [Xen-devel] [PATCH] x86: vlapic: Clear vector's TMR bit upon acceptance of edge-triggered interrupt to IRR

>>> On 15.03.18 at 00:35, wrote: > According to Intel SDM 10.8.4 Interrupt Acceptance for Fixed Interrupts: > "The trigger mode register (TMR) indicates the trigger mode of the > interrupt (see Figure 10-20). Upon acceptance of an interrupt > into the IRR, the corresponding

[Xen-devel] [PATCH] x86: vlapic: Clear vector's TMR bit upon acceptance of edge-triggered interrupt to IRR

According to Intel SDM 10.8.4 Interrupt Acceptance for Fixed Interrupts: "The trigger mode register (TMR) indicates the trigger mode of the interrupt (see Figure 10-20). Upon acceptance of an interrupt into the IRR, the corresponding TMR bit is cleared for edge-triggered interrupts and set for