>>> On 15.01.19 at 13:52, wrote:
> On 2019/1/15 0:47, Jan Beulich wrote:
> On 20.12.18 at 14:12, wrote:
>>> --- a/xen/arch/x86/cpu/mcheck/mce_amd.c
>>> +++ b/xen/arch/x86/cpu/mcheck/mce_amd.c
>>> @@ -162,7 +162,8 @@ mcequirk_lookup_amd_quirkdata(struct cpuinfo_x86 *c)
>>> {
>>> int i;
On 2019/1/15 0:47, Jan Beulich wrote:
On 20.12.18 at 14:12, wrote:
>> --- a/xen/arch/x86/cpu/mcheck/mce_amd.c
>> +++ b/xen/arch/x86/cpu/mcheck/mce_amd.c
>> @@ -162,7 +162,8 @@ mcequirk_lookup_amd_quirkdata(struct cpuinfo_x86 *c)
>> {
>> int i;
>>
>> -BUG_ON(c->x86_vendor != X86
>>> On 20.12.18 at 14:12, wrote:
> --- a/xen/arch/x86/cpu/mcheck/mce_amd.c
> +++ b/xen/arch/x86/cpu/mcheck/mce_amd.c
> @@ -162,7 +162,8 @@ mcequirk_lookup_amd_quirkdata(struct cpuinfo_x86 *c)
> {
> int i;
>
> -BUG_ON(c->x86_vendor != X86_VENDOR_AMD);
> +if (c->x86_vendor != X86_VEN
The machine check architecture for Hygon Dhyana CPU is similar to the
AMD family 17h one. Add vendor checking for Hygon Dhyana to share the
code path of AMD family 17h.
Signed-off-by: Pu Wen
---
xen/arch/x86/cpu/common.c | 3 ++-
xen/arch/x86/cpu/mcheck/amd_nonfatal.c | 5 +++--
xen
