> >> >> > @@ -40,3 +42,102 @@ static int __init parse_ipt_params(const
> >> >> > char
> >> >> > +static inline void ipt_save_msr(struct ipt_ctx *ctx, unsigned
> >> >> > +int
> >> >> > +addr_range) {
> >> >> > +unsigned int i;
> >> >> > +
> >> >> > +rdmsrl(MSR_IA32_RTIT_STATUS,
>>> On 04.07.18 at 10:48, wrote:
>> >> > @@ -40,3 +42,102 @@ static int __init parse_ipt_params(const char
>> >> > +static inline void ipt_save_msr(struct ipt_ctx *ctx, unsigned int
>> >> > +addr_range) {
>> >> > +unsigned int i;
>> >> > +
>> >> > +rdmsrl(MSR_IA32_RTIT_STATUS,
> >> > @@ -40,3 +42,102 @@ static int __init parse_ipt_params(const char
> >> > +static inline void ipt_save_msr(struct ipt_ctx *ctx, unsigned int
> >> > +addr_range) {
> >> > +unsigned int i;
> >> > +
> >> > +rdmsrl(MSR_IA32_RTIT_STATUS, ctx->status);
> >> > +
>>> On 03.07.18 at 12:18, wrote:
>> > @@ -40,3 +42,102 @@ static int __init parse_ipt_params(const char
>> > +static inline void ipt_save_msr(struct ipt_ctx *ctx, unsigned int
>> > +addr_range) {
>> > +unsigned int i;
>> > +
>> > +rdmsrl(MSR_IA32_RTIT_STATUS, ctx->status);
>> > +
> > @@ -40,3 +42,102 @@ static int __init parse_ipt_params(const char
> > *str)
> >
> > return 0;
> > }
> > +
> > +static inline void ipt_load_msr(const struct ipt_ctx *ctx,
> > + unsigned int addr_range)
>
> Please let the compiler decide whether to inline such
>>> On 30.05.18 at 15:27, wrote:
> @@ -40,3 +42,102 @@ static int __init parse_ipt_params(const char *str)
>
> return 0;
> }
> +
> +static inline void ipt_load_msr(const struct ipt_ctx *ctx,
> + unsigned int addr_range)
Please let the compiler decide whether to
Load/Restore Intel Processor Trace Register in context switch.
MSR IA32_RTIT_CTL is loaded/stored automatically from VMCS.
When Intel Processor Trace is supported in guest, we need
to load/restore MSRs only when this feature is enabled
in guest.
Signed-off-by: Luwei Kang
---
