Re: [Xen-devel] [PATCH v3 03/25] x86emul: support F16C insns

2018-01-31 Thread Andrew Cooper
On 07/12/17 14:00, Jan Beulich wrote: > Note that this avoids emulating the behavior of VCVTPS2PH found on at > least some Intel CPUs, which update MXCSR even when the memory write > faults. > > Signed-off-by: Jan Beulich Acked-by: Andrew Cooper ___ X

[Xen-devel] [PATCH v3 03/25] x86emul: support F16C insns

2017-12-07 Thread Jan Beulich
Note that this avoids emulating the behavior of VCVTPS2PH found on at least some Intel CPUs, which update MXCSR even when the memory write faults. Signed-off-by: Jan Beulich --- a/tools/tests/x86_emulator/test_x86_emulator.c +++ b/tools/tests/x86_emulator/test_x86_emulator.c @@ -3053,6 +3053,47